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SSD1305Z Datasheet(PDF) 17 Page - List of Unclassifed Manufacturers |
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SSD1305Z Datasheet(HTML) 17 Page - List of Unclassifed Manufacturers |
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17 / 70 page ![]() SSD1305 Rev 1.9 P 17/70 May 2008 Solomon Systech Pin Name Pin Type Description CS# I This pin is the chip select input. (active LOW) D/C# I This is Data/Command control pin. When it is pulled HIGH (i.e. connect to VDDIO), the data at D[7:0] is treated as data. When it is pulled LOW, the data at D[7:0] will be transferred to the command register. In I2C mode, this pin acts as SA0 for slave address selection. For detail relationship to MCU interface signals, please refer to the Timing Characteristics Diagrams: Figure 13-1 to Figure 13-5. E (RD#) I When interfacing to a 6800-series microprocessor, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled HIGH (i.e. connect to VDDIO) and the chip is selected. When connecting to an 8080-microprocessor, this pin receives the Read (RD#) signal. Read operation is initiated when this pin is pulled LOW and the chip is selected. When serial interface is selected, this pin must be connected to VSS. R/W#(WR#) I This is read / write control input pin connecting to the MCU interface. When interfacing to a 6800-series microprocessor, this pin will be used as Read/Write (R/W#) selection input. Read mode will be carried out when this pin is pulled HIGH (i.e. connect to VDDIO) and write mode when LOW. When 8080 interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled LOW and the chip is selected. When serial interface is selected, this pin must be connected to VSS. D[7:0] IO These are 8-bit bi-directional data bus to be connected to the microprocessor’s data bus. When serial interface mode is selected, D0 will be the serial clock input: SCLK; D1 will be the serial data input: SDIN and D2 should be left opened. When I2C mode is selected, D2, D1 should be tied together and serve as SDAout, SDAin in application and D0 is the serial clock input, SCL. TR0-TR11 - Testing reserved pins. It should be kept NC. SEG0 ~ SEG131 O These pins provide Segment switch signals to OLED panel. They are in high impedance stage when display is OFF. COM0 ~ COM63 O These pins provide Common switch signals to OLED panel. They are in high impedance state when display is OFF. NC - This is dummy pin. Do not group or short NC pins together. Table 7-2 : MCU Bus Interface Pin Selection Pin Name I 2C Interface 6800- parallel interface (8 bit) 8080- parallel interface (8 bit) Serial interface BS0 0 0 0 0 BS1 1 0 1 0 BS2 0 1 1 0 Note (1) 0 is connected to VSS (2) 1 is connected to VDDIO |
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