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OPA863 Datasheet(PDF) 20 Page - Texas Instruments |
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OPA863 Datasheet(HTML) 20 Page - Texas Instruments |
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20 / 24 page ![]() Place bypass capacitors close t o power pins Place gain and feedback r esistors close to pins to mi nimize str ay capacit ance Place ser ies output resistors close to output pin to m inimi ze par asitic capacitance Ground and power plane removed from inner layers. Ground fill on outer layer s also removed Ground and power plane exist on inner layer s. Place bypass capacitors close t o power pins Remove GND and Power plane under output and i nv er ting pins to m inimize stray PCB capacitance C BYP R F R G + t V S- C BYP V S+ Representati ve schematic of a single channel 1 8 2 7 3 6 4 5 R S C BYP C BYP R F R F R G R G R S R S 20 OPA2863 SBOS982A – JUNE 2020 – REVISED JUNE 2020 www.ti.com Product Folder Links: OPA2863 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated 11.2 Layout Example Figure 19. Layout Recommendation |
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