PMS132 datasheet(68/100 Pages) PADAUK

68 / 100 page

PMS132/PMS132B

8bit OTP MCU with 12-bit ADC

Page 68 of 100

PDK-DS-PMS132(B)-EN_V104 – Jun. 2, 2020

6.10. Interrupt Edge Select Register (integs), IO address = 0x0c

Bit

Reset

R/W

Description

7 - 5

Reserved.

Timer16 edge selection.

0 : rising edge of the selected bit to trigger interrupt

1 : falling edge of the selected bit to trigger interrupt

3 - 2

PB0/PA4 edge selection.

00 : both rising edge and falling edge of the selected bit to trigger interrupt

01 : rising edge of the selected bit to trigger interrupt

10 : falling edge of the selected bit to trigger interrupt

11 : reserved.

1 - 0

PA0/PB5 edge selection.

00 : both rising edge and falling edge of the selected bit to trigger interrupt

01 : rising edge of the selected bit to trigger interrupt

10 : falling edge of the selected bit to trigger interrupt

reserved.

6.11. Port A Digital Input Enable Register (padier), IO address = 0x0d

Bit

Reset

R/W

Description

Enable PA7 digital input and wake-up event.

1 / 0 : enable / disable.

This bit should be set to low to prevent leakage current when external crystal oscillator is

used. If this bit is set to low, PA7 can NOT be used to wake-up the system.

Enable PA6 digital input and wake-up event.

1 / 0 : enable / disable.

This bit should be set to low to prevent leakage current when external crystal oscillator is

used. If this bit is set to low, PA6 can NOT be used to wake-up the system.

Enable PA5 digital input and wake-up event.

1 / 0 : enable / disable.

This bit can be set to low to disable wake-up from PA5 toggling.

Enable PA4 digital input, wake-up event and interrupt request.

1 / 0 : enable / disable.

This bit can be set to low to prevent leakage current when PA4 is assigned as AD input,

and to disable wake-up from PA4 toggling and interrupt request from this pin.

Enable PA3 digital input and wake-up event.

1 / 0 : enable / disable.

This bit should be set to low when PA3 is assigned as AD input to prevent leakage current.

If this bit is set to low, PA3 can NOT be used to wake-up the system.

2 - 1

Reserved

Enable PA0 digital input, wake-up event and interrupt request. 1 /0: enable / disable.

This bit can be set to low to prevent leakage current when PA0 is assigned as AD input,

and to disable wake-up from PA0 toggling and interrupt request from this pin.

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