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47L16 Datasheet(PDF) 19 Page - Microchip Technology |
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47L16 Datasheet(HTML) 19 Page - Microchip Technology |
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19 / 40 page  2015-2016 Microchip Technology Inc. DS20005371C-page 19 47L04/47C04/47L16/47C16 2.5 STORE/RECALL OPERATIONS In order to provide nonvolatile storage of the SRAM data, an EEPROM array is included on the 47XXX. The EEPROM array is not directly accessible to the user. Instead, data is written to and read from the EEPROM array using the various Store and Recall operations, respectively. To provide design flexibility for the user, the 47XXX can automatically perform Store and Recall operations on power-down and power-up, respectively, and also offers Software commands and a Hardware Store pin for manual control. Refer to Section 2.4.2 “Command Register” for details of the Software Store and Software Recall commands. 2.5.1 AUTO-STORE To simplify device usage, the 47XXX features an Auto-Store mechanism. To enable this feature, the user must place a capacitor on the VCAP pin and ensure the ASE bit in the STATUS register is set to ‘1’. The capacitor is charged through the VCC pin. When the 47XXX detects a power-down event, the device automatically switches to the capacitor for power and initiates the Auto-Store operation. The Auto-Store is initiated when VCAP falls below VTRIP. Even if power is restored, the 47XXX cannot be accessed for TSTORE time after the Auto-Store is initi- ated. To avoid extraneous Store operations, the Auto-Store will only be initiated if the AM bit in the STATUS register is set to a ‘1’, indicating the SRAM array has been modified since the last Store or Recall operation. The AM bit in the STATUS register is cleared at the completion of the Auto-Store operation. 2.5.2 HARDWARE STORE The HS pin provides a method for manually initiating a Store operation through an external trigger. Driving the HS pin high for a minimum of THSPW time will initiate a Hardware Store operation if the AM bit in the STATUS register is a ‘1’. Driving the HS pin high will also automatically initiate a STATUS register write cycle to write the EVENT bit to a ‘1’, regardless of the state of the AM bit. If the AM bit is a ‘1’, the Hardware Store is initiated on the rising edge of the HS pin, and then the 47XXX cannot be accessed for (TSTORE + TWC) time. If the AM bit is a ‘0’, only the EVENT bit write is initiated on the rising edge of the HS pin, and then the 47XXX cannot be accessed for TWC time while the STATUS register is written. The AM bit in the STATUS register is cleared at the completion of the Hardware Store operation. 2.5.3 AUTO-RECALL The 47XXX features an Auto-Recall mechanism that is performed on power-up, regardless of the state of the ASE bit. This feature ensures that the SRAM data duplicates the EEPROM data on power-up. The Auto-Recall is only initiated the first time VCAP rises above VTRIP after a POR event, and the 47XXX can- not be accessed for TRECALL time after the Auto-Recall is initiated. The AM bit in the STATUS register is cleared at the completion of the Auto-Recall operation. Note: Once a Store operation is initiated, it cannot be aborted. Note 1: The HS pin is ignored during Store and Recall operations, or if VCAP is below VTRIP. 2: The HS pin is triggered on the rising edge. If the HS pin remains high after the Hardware Store and STATUS register write are complete, the device can still be accessed normally just as if the HS pin were low. Initiating a subsequent Hard- ware Store operation requires toggling HS low then high again. Note 1: If power is lost during an Auto-Recall operation, the Auto-Recall is aborted and the Auto-Store is not performed. 2: Auto-Recall is only performed the first time VCAP rises above VTRIP after a POR event. However, SRAM data will be retained as long as Vcc remains above VPOR. TABLE 2-7: STORE ENABLE TRUTH TABLE ASE Bit AM Bit Auto-Store Enabled Hardware Store Enabled Software Store Enabled Auto-Recall Enabled Software Recall Enabled x 0 No No Yes Yes Yes 01 No Yes Yes Yes Yes 11 Yes Yes Yes Yes Yes |
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