47L16 datasheet(25/40 Pages) MICROCHIP

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 2015-2016 Microchip Technology Inc.

DS20005371C-page 25

47L04/47C04/47L16/47C16

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

3.1

Pin Descriptions

3.1.1

CAPACITOR INPUT (VCAP)

The VCAP pin is connected to the internal power bus of

the 47XXX.

If the Auto-Store feature is used, a CVCAP capacitor

must be connected to the VCAP pin in order to store

the energy required to complete the Auto-Store

operation

power-down.

The

capacitor

automatically charged through VCC. See Table 1-1 for

recommended CVCAP values.

If a capacitor is not connected to the VCAP pin, then

the VCAP pin must be connected to the VCC pin and

the Auto-Store feature must be disabled by writing the

ASE

bit in the STATUS register to a ‘0’ to prevent data

corruption in the EEPROM array when power is lost.

3.1.2

CHIP ADDRESS INPUTS (A1, A2)

The A1, A2 inputs are used by the 47XXX for multiple

device operation. The levels on these inputs are

compared with the corresponding Chip Select bits in

the slave address. The chip is selected if the

comparison is true.

Up to four devices may be connected to the same bus

by using different Chip Select bit combinations. If left

unconnected, these inputs will be pulled down

internally to VSS.

3.1.3

SERIAL DATA (SDA)

This is a bidirectional pin used to transfer addresses

and data into and data out of the device. It is an

open-drain terminal, therefore, the SDA bus requires a

pull-up resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ

for 400 kHz and 1 MHz).

For normal data transfer SDA is allowed to change only

during SCL low. Changes during SCL high are

reserved for indicating the Start and Stop conditions.

3.1.4

SERIAL CLOCK (SCL)

This input is used to synchronize the data transfer from

and to the device.

3.1.5

HARDWARE STORE/EVENT

DETECT (HS)

This pin is used to initiate a Hardware Store operation

by driving the pin high for THSPW time. This will also

trigger a STATUS register write cycle to write the

EVENT

bit to a ‘1’.

This pin is ignored during Store and Recall operations,

or if VCAP is below VTRIP. If the AM bit in the STATUS

initiated, but the EVENT bit will still be written to a ‘1’.

If left unconnected, this input will be pulled down

internally to VSS.

3.2

Input Pull-down Circuitry

The A1, A2, and HS pins are internally pulled down to

VSS using dual-strength pull-down circuits. Figure 3-1

shows the block diagram of the circuit.

The circuit is designed to have a relatively strong

pull-down strength when the input voltage is below VIL,

and a much weaker pull-down when the input is above

VIH.

See Table 1-1 for actual resistance values.

FIGURE 3-1:

PULL-DOWN CIRCUIT

BLOCK DIAGRAM

TABLE 3-1:

PIN FUNCTION TABLE

Name

8-pin

PDIP

SOIC

TSSOP

Function

VCAP

Capacitor Input

Chip Select Input

VSS

Ground

SDA

Serial Data

SCL

Serial Clock

Hardware Store/

Event Detect Input

VCC

Power Supply

I/O PIN

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