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PI1004 Data Sheet Rev. 2.5 Page 6 of 16

INPUTS

OUTPUTS

ENABLE

UVLO

VID[5:0]

OVP

PWRGD

REFOUT

EAO

SS

LX

X

L

L

LLL

HH

X

L

L

≤ VID

L

L

H

VID Valid

Active

Active

VID

H

L

VID Valid

Active

Active

VID

Active

H

H

L

X11111

Active

Active

VID

L

L

(Limited drive)

ENABLE Low = Off

UVLO High = VCC is low

OVP High = Fault

PWRGD Low = Fault

VID = See VID Table 1

Functional Description

The block diagram in Figure 2 shows that the PI1004-1 has

a programmed VID offset function and no OVP function.

Figure 3 shows the PI1004-2 with the OVP function in

place of the VID offset. Unless otherwise stated please

refer to Figure 2 and application diagram Figure 4a for

the following description.

Voltage identification and Reference Out

The REFOUT output pin provides a scaled temperature

stable reference voltage (see temperature curves in figure

15) that is incremented by the VID input state decoding

and DAC (digital to analog converter) function. The 6 bit

DAC provides a minimum increment resolution of 12.5mV.

The VR10.X VID code accuracy shown in Table 1 is

measured at the output of the error amp in the unity gain

buffer configuration.

REFOUT will be determined by VID[5:0] according to the

Intel VR10.X Voltage Identification Table. In a typical CPU

application using AVP (Adaptive Voltage Positioning)

REFIN is tied directly to REFOUT and EAIP is tied to REFOUT

through a resistor for AVP adjustment. VID = x1111 is

treated as a fault and sets the Fault Latch function that

will be explained further in the other sections.

Current Sensing and AVP

Pins ISN and ISP form the input to a differential voltage

sense amplifier that can be used for current sensing and

adaptive voltage positioning (AVP). The amplifier has a

narrow common mode input range for ground reference

voltages.

The AVP amplifier has a fixed gain of 4 to amplify the

voltage across a sense resistor that is representative of the

load current. The output voltage of the amplifier is fed to

a unity gain buffer and impressed across the external RG

resistor converting the voltage to a current that is

reflected as a sink current at the IAVP pin 15.

The PI-1004-1 has a second voltage to current converter to

create the OFFSET function with a fixed reference voltage

of 250mV that is impressed across an external ROFFSET

resistor. This voltage to current conversion reflects a fixed

sink current at the IAVP pin. The sum of these two currents

flows through the external resistor, RAVP when connected

as shown in figure 4a completing the adaptive and offset

functions. The control error amplifier input voltage will be

dependent on the reference determined by the VID input

state, minus any programmed offset voltage, minus the

AVP correction for load setting the slope of the load line.

The IAVP pin is set up to provide a current proportional to

the load current. Various load lines can be selected by

choosing values of the output current shunt resistor, RG

and the resistor between REFOUT and EAIP (RAVP) for the

proper droop. The value of the current shunt should be

chosen for a voltage drop of 135mV or slightly lower at

full load.

Differential Output Voltage Sense

The core control error amplifier has two non-inverting

inputs to accommodate a soft start feature. With the

proper non-faulted conditions the soft-start charging

current of 5uA will be sourced out of the SS pin to an

external capacitor. This feature provides the ability to

control the rate of rise in the output voltage up to the

point of regulation. The fault conditions are defined in the

fault circuitry section and listed in Table 2. If a fault

condition exits the internal sink transistor will hold the SS

pin to the signal ground potential. Recovery from any of

the fault conditions will result in a full soft-start interval.

The lower of the two non-inverting inputs of the error

amplifier will dominate. When all faults are cleared the SS

input provides the dominant ramping input voltage until

it exceeds the EAIP reference. The SS input continues to

ramp to the soft-start clamp voltage while the EAIP

Table 2. I/O Functional States