Signal 1

GND Plane

Power Plane

Signal 2

Figure 11-2. Example Layout

The majority of signal traces must run on a single layer, preferably Signal 1. Immediately next to this layer must

be the GND plane, which is solid with no cuts. Avoid running signal traces across a split in the ground or power

plane. When running across split planes is unavoidable, sufficient decoupling must be used. Minimizing the

number of signal vias reduces EMI by reducing inductance at high frequencies. Figure 11-3 illustrates an

example of a PCB layout with the TMUX1575. Some key considerations are:

High-speed switches require proper layout and design procedures for optimum performance.

Keep the input lines as short as possible.

Use a solid ground plane to help reduce electromagnetic interference (EMI) noise pickup.

Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if

possible, and only make perpendicular crossings when necessary.

11.2 Layout Example

S1B

S2B

S2A

S1A

S3A

V

DD

EN

S3B

S4A

SE L

GND

S4B

D3

D4

D1

D2

To input/output

port A

To Control

Logic

Top Layer Routing

Bottom Layer Routing

Via

To common

input/output port

SxA

To A port

To input/output

port B

Example:

SxB

To B port

Dx

To common port

Decoupling capacitor under

part on bottom layer for

lowest inductance

Figure 11-3. Example Layout

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TMUX1575

SCDS423 – SEPTEMBER 2020

Copyright © 2020 Texas Instruments Incorporated

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