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XTPS562211DRLR Datasheet(PDF) 3 Page - Texas Instruments |
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XTPS562211DRLR Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 34 page ![]() 5 Pin Configuration and Functions PG/SS 1 2 3 4 8 7 6 5 VIN SW GND BOOT EN MODE FB 8-Pin SOT583 DRL Package (Top View) Pin Functions PIN I/O(1) DESCRIPTION NAME NO. PG/SS 1 I/O This pin can be selected as Power-Good function or Soft-Start function, depending on device MODE pin configuration. • If the Power-Good function is selected, this is an open-drain power-good indicator. • If the Soft-Start function is selected, an external capacitor connected from this pin to GND defines the rise time for the internal reference voltage. VIN 2 P Input voltage supply pin for the control circuitry. Connect the input decoupling capacitors between VIN and GND. SW 3 P Switch node terminal. Connect the output inductor to this pin. GND 4 G GND terminal for the controller circuit and the internal circuitry. BOOT 5 P Supply input for the High-side MOSFET gate drive circuit. Connect a 0.1-µF capacitor between BOOT and SW pins. EN 6 I/O Enable input control. Driving EN high or leaving this pin floating enables the converter. An external resistor divider can be used to imply an adjustable VIN UVLO function. MODE 7 I/O Device operation mode in light load (Eco-mode operation or FCCM operation) and Pin 1 function (Power-Good pin or Soft-Start pin) selection pin. Connect a resistor from MODE to GND to configure the device according to Table 7-1. FB 8 I Converter feedback input. Connect to output voltage with feedback resistor divider. (1) I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power. www.ti.com TPS562211 SLUSDX0 – SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TPS562211 |
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