Design Information

MMM6035 Advance Information, Rev. 2.4

Freescale Semiconductor

15

To meet the GSM power versus time mask and switching transient requirement, the MMM6035 must be

provided with a DAC ramp profile on the VRAMP input, as well as proper timing on digital controls for

the control loop circuitry as shown in Figure 5.

Figure 5. Recommended Power Control Timing

The ramp profile consists of a pedestal voltage, 12 to 16 discrete voltage steps on the rising edge of the

burst, a constant region, 12 to 16 steps on the falling edge of the burst, and a final voltage. Generally, the

same profile, scaled in amplitude, us used for all frequencies and power control levels.

A feature unique to the MMM6035 is the internal offset generator which functions to cancel any external

offset associated with the DAC driving the VRAMP pin. In addition, the MMM6035 has a 200 kHz

TX_EN

twu

Vramp

Voffset

Vramp(H)

Pout (dB)

VD_OUT

+4dBc

-30dBc*

-6dBc*

* Derated at low Pout

10µs

10µs

8µs

542.8µs

10µs

10µs

8µs

Vpedestal

Iso1

Iso2

tr_ramp

tf_ramp

Vramp(L)