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DRV8955PRGER Datasheet(PDF) 13 Page - Texas Instruments |
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DRV8955PRGER Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 45 page ![]() 7.3 Feature Description The following table shows the recommended values of the external components for the driver. Figure 7-2. Resistor divider connected to the VREF pins Table 7-1. External Components COMPONENT PIN 1 PIN 2 RECOMMENDED CVM1 VM PGND Two X7R, 0.01-µF, VM-rated ceramic capacitors CVM2 VM PGND Bulk, VM-rated capacitor CVCP VCP VM X7R, 0.22-µF, 16-V ceramic capacitor CSW CPH CPL X7R, 0.022-µF, VM-rated ceramic capacitor CDVDD DVDD GND X7R, 0.47-µF to 1-µF, 6.3-V or 10-V rated ceramic capacitor RnFAULT VCC nFAULT >4.7-kΩ resistor RREF1 VREF12 VCC Resistor to limit chopping current. It is recommended that the value of parallel combination of RREF1 and RREF2 should be less than 50-kΩ. RREF2 (Optional) VREF12 GND RREF3 VREF34 VCC Resistor to limit chopping current. It is recommended that the value of parallel combination of RREF3 and RREF4 should be less than 50-kΩ. RREF4 (Optional) VREF34 GND VCC is not a pin on the device, but a VCC supply voltage pullup is required for open-drain output nFAULT; nFAULT may be pulled up to DVDD. 7.3.1 Configuration Options and Bridge Control The MODE pin configures the half-bridges such that one, two or four solenoid loads can be driven by the device. Higher load currents can be supported by paralleling half-bridges. Table 7-2 shows the four possible settings - Table 7-2. DRV8955 Configuration Options MODE Number of Half-bridges Indepe ndent High-z Control RdsON (HS + LS) Maximum ITRIP Input Control Pins Current Control 0 Four No 330 mΩ 2.5 A IN1, IN2, IN3, IN4 VREF12 controls the ITRIP for OUT1 and OUT2, VREF34 controls the ITRIP for OUT3 and OUT4. 1 Two (Connect OUT1 and OUT2 together, and OUT3 and OUT4 together) No 160 mΩ 5 A IN2 controls OUT1 and OUT2, IN4 controls OUT3 and OUT4 VREF12 controls the ITRIP for OUT1 and OUT2, VREF34 controls the ITRIP for OUT3 and OUT4. Hi-z One (connect all four OUT pins together) No 80 mΩ 10 A IN4 controls the combined output VREF12 must be shorted to VREF34 to control the ITRIP for output load. 330kΩ to GND Four (independent High-z) Yes 330 mΩ No ITRIP control available. IN1, IN2, IN3, IN4, EN1, EN2, EN3, EN4 The current for each output has to be controlled by the input PWM pulse width. The VREF and TOFF pins are reassigned as enable (ENx) pins in this mode. www.ti.com DRV8955 SLOSE71 – APRIL 2020 – REVISED DECEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: DRV8955 |
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