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RA6M3 Datasheet(PDF) 13 Page - Renesas Technology Corp

Part # RA6M3
Description  Leading performance 120-MHz Arm Cortex-M4 core, up to 2-MB code flash memory
PDF  116 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

RA6M3 Datasheet(HTML) 13 Page - Renesas Technology Corp

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R01DS0358EJ0110 Rev.1.10
Page 13 of 116
Dec 25, 2020
RA6M3 Group
1. Overview
1.5
Pin Functions
Table 1.16
Pin functions (1 of 5)
Function
Signal
I/O
Description
Power supply
VCC
Input
Digital voltage supply pin. This is used as the digital power supply for the
respective modules and internal voltage regulator, and used to monitor the
voltage of the POR/LVD. Connect to the system power supply. Connect to
VSS through a 0.1-μF smoothing capacitor close to each VCC pin.
VCL0
-
Connect to VSS through a 0.1-μF smoothing capacitor close to each VCL
pin. Stabilize the internal power supply.
VCL
-
VSS
Input
Ground pin. Connect to the system power supply (0 V).
VBATT
Input
Backup power pin
Clock
XTAL
Output
Pins for a crystal resonator. An external clock signal can be input through the
EXTAL pin.
EXTAL
Input
XCIN
Input
Input/output pins for the sub-clock oscillator. Connect a crystal resonator
between XCOUT and XCIN.
XCOUT
Output
EBCLK
Output
Outputs the external bus clock for external devices
SDCLK
Output
Outputs the SDRAM-dedicated clock
CLKOUT
Output
Clock output pin
Operating mode
control
MD
Input
Pin for setting the operating mode. The signal level on this pin must not be
changed during operation mode transition on release from the reset state.
System control
RES
Input
Reset signal input pin. The MCU enters the reset state when this signal goes
low.
CAC
CACREF
Input
Measurement reference clock input pin
Interrupt
NMI
Input
Non-maskable interrupt request pin
IRQ0 to IRQ15
Input
Maskable interrupt request pins
KINT
KR00 to KR07
Input
A key interrupt can be generated by inputting a falling edge to the key
interrupt input pins
On-chip emulator
TMS
I/O
On-chip emulator or boundary scan pins
TDI
Input
TCK
Input
TDO
Output
TCLK
Output
This pin outputs the clock for synchronization with the trace data
TDATA0 to TDATA3
Output
Trace data output
SWDIO
I/O
Serial wire debug data input/output pin
SWCLK
Input
Serial wire clock pin
SWO
Output
Serial wire trace output pin
External bus
interface
RD
Output
Strobe signal indicating that reading from the external bus interface space is
in progress, active low
WR
Output
Strobe signal indicating that writing to the external bus interface space is in
progress, in 1-write strobe mode, active low
WR0 to WR1
Output
Strobe signals indicating that either group of data bus pins (D07 to D00 or
D15 to D08) is valid in writing to the external bus interface space, in byte
strobe mode, active low
BC0 to BC1
Output
Strobe signals indicating that either group of data bus pins (D07 to D00 or
D15 to D08) is valid in access to the external bus interface space, in 1-write
strobe mode, active low
ALE
Output
Address latch signal when address/data multiplexed bus is selected
WAIT
Input
Input pin for wait request signals in access to the external space, active low
CS0 to CS7
Output
Select signals for CS areas, active low
A00 to A23
Output
Address bus
D00 to D15
I/O
Data bus
A00/D00 to A15/D15
I/O
Address/data multiplexed bus



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