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M62384FP Datasheet(PDF) 3 Page - Renesas Technology Corp

Part # M62384FP
Description  8-Bit, 4-Channel, 3 to 5 V D-A Converter (Buffered)
PDF  8 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M62384FP Datasheet(HTML) 3 Page - Renesas Technology Corp

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M62384FP
REJ03F0077-0200 Rev.2.00 Mar 25, 2008
Page 3 of 7
Absolute Maximum Ratings
(Unless specified otherwise, Ta = 25ºC)
Item
Symbol
Rated Value
Unit
Conditions
Power supply voltage
VCC,VDD
–0.3 to 7.0
V
Digital input voltage
VDIN
–0.3 to Vcc+0.3 (
≤ 7.0)
V
DC voltage (“H” level)
Reference voltage input voltage
Vref
–0.3 to Vcc+0.3 (
≤ 7.0)
V
D-A output voltage
VAO
–0.3 to Vcc+0.3 (
≤ 7.0)
V
Permissible loss
Pd
300
mW
Operating ambient temperature
Topr
–20 to +75
°C
Storage temperature
Tstg
–40 to +125
°C
Recommended Operating Conditions
(Unless specified otherwise, VCC = VDD = 5 V ±10%, Vref = 2 V to VCC, VSS = GND = 0 V, fsck = 5 MHz,
VDINH = VDD, VDINL = VSS, Ta = 20ºC to 75ºC)
Specification Values
Item
Symbol
Min.
Typ.
Max.
Unit
Test Conditions
Analog power supply voltage
VCC
2.7
5.5
V
VCC = VDD
Digital power supply voltage
VDD
2.7
5.5
V
VCC = VDD
Reference voltage
Vref
2.0
5.5
V
Vref
≤ VCC
Serial clock frequency
fsck
10
MHz
“H” level digital input voltage
VDINH
0.5VDD
VDD
V
“L” level digital input voltage
VDINL
VSS
0.2VDD
V
Clock “H” pulse width
tsckH
30
ns
VCC = VDD
≥ 2.7V
Clock “L” pulse width
tsckL
30
ns
VCC = VDD
≥ 2.7V
Clock rise time
tsckR
200
ns
Clock fall time
tsckF
200
ns
Data setup time
tDCH
10
ns
Data hold time
tCHD
20
ns
Load setup time
tCHL
40
ns
Load hold time
tLDC
20
ns
Load “H” pulse width
tLDH
20
ns
Reset “L” pulse width
tRSTL
50
ns
Load setup time after reset release
tRCHL
50
ns
Timing Chart
SCK
SDI
SLD
RST
AO
tSCKL
tSCKH
tSCKR
t SCKF
t DCH
t CHD
t CHL
t LDH
t LDC
t RSTL
t RCHL
t LDD



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