LT3476 datasheet(17/36 Pages) AD

17 / 36 page

LT3966

Rev. 0

For more information www.analog.com

Figure 11. I2C Broadcast Write

3966 F12

LT3966

VOUT

Figure 12.

3966 F11

0 ACK

START

STOP

SDA

SCL

BROADCAST ADDRESS (WRITE)

APPLICATIONS INFORMATION

DIMMING CODE CHANGES AND DIMMING

SYNCHRONIZATION

To ensure glitch-free changes of the DIM, a new value

of DIM is only loaded upon completion of the previous

dimming cycle, at the rollover of the counter to 0. This

prevents short or otherwise malformed pulses at the out-

put, but will introduce a small latency depending on the

dimming cycle length.

If a channel’s dimming generator is disabled by setting the

DIMEN bit to 0 or by bringing the channel’s CTRL/PWM pin

low, the counter for that channel will be halted and cleared

to 0. Upon re-enabling the dimming generator, the counter

value may not be synchronized to the other channels.

LT3966 allows all dimming generators on the I2C bus

to be synchronized by initiating a write to the broadcast

address, 0x18 (Figure 11).

When synchronizing the dimming generators or enabling a

dimming generator by changing the DIMEN bit from 0 to 1,

a one-clock low time will be seen at the output as the

device clears the counter and loads the latest DIM code.

FB OUTPUT VOLTAGE SETTING

An output voltage limit is required for the case of an

open LED strand. By connecting FB to a resistor divider

between the output voltage and GND, a maximum output

voltage limit can be set (see Figure 12).

Choose R1 and R2 so that the output voltage reaches the

desired maximum when FB reaches its 1.2V regulation point,

Equation 6.

VOUT = 1.2 • 1+

⎛

⎝⎜

⎞

⎠⎟

(6)

For the case of driving LEDs, the output voltage setting

should be programmed higher than the maximum forward

voltage of the LEDs being driven, when accounting for

process and temperature variation.

FAULT DETECTION USING FB

LT3966 uses the FB pin voltage to detect shorted and

overvoltage output conditions, as well as open output

conditions. The conditions for these faults and response

are as follows:

A shorted output is detected by the FB voltage remain-

ing at 300mV or lower after the device’s soft-start has

completed. In response, the channel’s SHORT status

bit will be asserted, and the device’s ALERT pin will

also assert if SHORT_EN is set. The device will either

latchoff or enter a hiccup retry cycle dependent on the

state of the faulted channel’s LATOFF bit.

Output overvoltage is detected by the FB pin exceeding

the regulation point by 60mV (1.26V total). In response,

the channel’s OVFB status bit will be asserted, and the

device’s ALERT pin will also assert if OVFB_EN is set.

The device will stop switching and raise TG to discon-

nect the output, and will resume normal operation once

the FB has fallen by 25mV.

An open output is detected by the combination of FB

voltage reaching at least 1.15V and the LED current

falling to less than 10% of full-scale value. In response,

the channel’s OPEN status bit will be asserted, and

the ALERT pin will also assert if OPEN_EN is set. This

condition is considered to be standard constant voltage

regulation, and the channel will continue to switch

while regulating FB to 1.2V.

LT3476 Datasheet(PDF) 17 Page - Analog Devices

LT3476 Datasheet(HTML) 17 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

Datasheet Download

Link URL