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LTC7151S Datasheet(PDF) 19 Page - Analog Devices |
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LTC7151S Datasheet(HTML) 19 Page - Analog Devices |
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19 / 26 page ![]() LTC3311 19 Rev. 0 For more information www.analog.com TYPICAL APPLICATIONS Dual Phase 5V to 3.3V, 25A, Forced Continuous Mode LTC3311 LTC3311 3311 TA02 VOUT 3.3V 25A PGOOD SW FB RT EN PGOOD SW FB RT EN MODE/SYNC SSTI ITH 22µF ×2 22µF NC 22µF x3 22µF 0.01µF 0.01µF 0.01µF 4.7pF 1µF 1µF 22µF 22µF 0.01µF 200nH PGOOD 200nH 4.99k 1M 100k 470pF 0.1µF PGOOD VIN VIN 4.5V TO 5.5V PGND AGND SSTT VIN VIN VIN PGND AGND 274k 100k 48.7k 274k 180° L = COILCRAFT, XEL4030-201ME MODE/SYNC ITH APPLICATIONS INFORMATION Large, switched currents flow in the LTC3311 VIN, SW and PGND pins and the input capacitors. The loops formed by the input capacitors should be as small as possible by placing the capacitors adjacent to the VIN and PGND pins. Place the input capacitors, inductor and output capaci- tors on the same layer of the circuit board. Place a local, unbroken ground plane under the application circuit on the layer closest to the surface layer. The SW node should be as short as possible. Finally, keep the FB and RT nodes small and away from the noisy SW node. High Temperature Considerations For higher ambient temperatures, care should be taken in the layout of the PCB to ensure good heat sinking of the LTC3311. The PGND pins and the exposed pad on the bottom of the package should be soldered to a ground plane. This ground should be tied to large copper layers below with many thermal vias; these layers will spread heat dissipated by the LTC3311. Placing additional vias can reduce thermal resistance further. The maximum load current should be derated as the ambient temperature approaches the maximum junction rating. Power dissi- pation within the LTC3311 can be estimated by calculat- ing the total power loss from an efficiency measurement and subtracting the inductor loss. The die temperature is monitored with the SSTT pin. |
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