PH4530L datasheet(2/12 Pages) PHILIPS

2 / 12 page

9397 750 14031

Product data sheet

Rev. 02 — 26 January 2005

2 of 12

Philips Semiconductors

PH4530L

N-channel TrenchMOS™ logic level FET

Ordering information

Limiting values

Table 2:

Ordering information

Type number

Package

Name

Description

Version

PH4530L

LFPAK

plastic single-ended surface mounted package (LFPAK); 4 leads

SOT669

Table 3:

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter

Conditions

Min

Max

Unit

VDS

drain-source voltage (DC)

°C ≤ T

j ≤ 150 °C

VGS

gate-source voltage (DC)

±20

drain current (DC)

Tmb =25 °C; VGS =10V; Figure 2 and 3

-80

Tmb = 100 °C; VGS =10V; Figure 2

240

IDM

peak drain current

Tmb =25 °C; pulsed; tp ≤ 10 µs; Figure 3

50.7

Ptot

total power dissipation

Tmb =25 °C; Figure 1

62.5

Tstg

storage temperature

−55

+150

°C

junction temperature

−55

+150

°C

Source-drain diode

source (diode forward) current (DC)

Tmb =25 °C

ISM

peak source (diode forward) current Tmb =25 °C; pulsed; tp ≤ 10 µs

150

Avalanche ruggedness

EDS(AL)S non-repetitive drain-source

avalanche energy

unclamped inductive load; ID = 36.2 A;

tp = 0.24 ms; VDD ≤ 30 V; VGS =10V;

starting Tj =25 °C

130

PH4530L Datasheet(PDF) 2 Page - NXP Semiconductors

PH4530L Datasheet(HTML) 2 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12

Datasheet Download

Link URL