MSP3451G datasheet(91/102 Pages) MICRONAS

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PRELIMINARY DATA SHEET

MSP 34x1G

MICRONAS INTERMETALL

6.3.6. FIR-Parameter, Registers FIR1 and FIR2

Note: The use of this register is no longer recom-

mended. It should be used only in cases where soft-

ware compatibility to the MSP 34x0D is required.

Using the STANDARD SELECTION register together

with the MODUS register provides a more economic

way to program the MSP 34x1G.

Data-shaping and/or FM/AM bandwidth limitation is

performed by a pair of linear phase Finite Impulse

Response filters (FIR-filter). The filter coefficients are

programmable and are either configured automatically

by the STANDARD SELECT register or written manu-

ally by the control processor via the control bus. Two

not necessarily different sets of coefficients are

required: one for MSP-Ch1 (NICAM or FM2) and one

for MSP-Ch2 (FM1 = FM-mono). In Table 6–13 several

coefficient sets are proposed.

To load the FIR-filters, the following data values are to

transferred

bits

time

embedded

LSB-bound in a 16-bit word.

The loading sequences must be obeyed. To change a

coefficient set, the complete block FIR1 or FIR2 must

be transmitted.

Note: For compatibility with MSP 3410B, IMREG1 and

IMREG2 have to be transmitted. The value for

IMREG1 and IMREG2 is 004. Due to the partitioning to

8-bit units, the values 04hex, 40hex, and 00hex arise.

6.3.7. DCO-Registers

Note: The use of this register is no longer recom-

mended. It should be used only in cases where soft-

ware-compatibility to the MSP 34x0D is required.

Using the STANDARD SELECTION register together

with the MODUS register provides a more economic

way to program the MSP 34x1G.

When selecting a TV-sound standard by means of the

STANDARD SELECT register, all frequency tuning is

performed automatically.

If manual setting of the tuning frequency is required, a

set of 24-bit registers determining the mixing frequen-

cies of the quadrature mixers can be written manually

into the IC. In Table 6–14, some examples of DCO reg-

isters are listed. It is necessary to divide them up into

low part and high part. The formula for the calculation

of the registers for any chosen IF frequency is as fol-

lows:

INCRdec = int(f/fs ⋅ 2

24)

with: int = integer function

= IF frequency in MHz

fS = sampling frequency (18.432 MHz)

Conversion of INCR into hex-format and separation of

the 12-bit low and high parts lead to the required regis-

ter values (DCO1_HI or _LO for MSP-Ch1, DCO2_HI

or LO for MSP-Ch2).

Table 6–12: Loading sequence for FIR-coefficients

FIR1

00 01hex (MSP-Ch1: NICAM/FM2)

No.

Symbol Name

Bits

Value

NICAM/FM2_Coeff. (5)

see Table 6–13

NICAM/FM2_Coeff. (4)

NICAM/FM2_Coeff. (3)

NICAM/FM2_Coeff. (2)

NICAM/FM2_Coeff. (1)

NICAM/FM2_Coeff. (0)

FIR2

00 05hex (MSP-Ch2: FM1/AM)

No.

Symbol Name

Bits

Value

1IMREG1

04hex

2IMREG1/ IMREG2

40hex

3IMREG2

00hex

FM/AM_Coef (5)

see Table 6–13

FM/AM_Coef (4)

FM/AM_Coef (3)

FM/AM_Coef (2)

FM/AM_Coef (1)

FM/AM_Coef (0)

MSP3451G Datasheet(PDF) 91 Page - Micronas

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