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FC321SOT Datasheet(PDF) 6 Page - First Silicon Co., Ltd |
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FC321SOT Datasheet(HTML) 6 Page - First Silicon Co., Ltd |
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6 / 8 page ![]() For no-buffer configuration, there are two others ways to increase the phase margin: (a) by increasing the amplifier’s gain or (b) by placing a capacitor in parallel with the feedback resistor to counteract the parasitic capacitance associated with inverting node. Power-Supply Bypassing and Layout The FC321SOT family operates from either a single +2.5V to +5.5V supply or dual ±1.25V to ±2.75V supplies. For single-supply operation, bypass the power supply VDD with a 0.1μF ceramic capacitor which should be placed close to the VDD pin. For dual-supply operation, both the VDD and the VSS supplies should be bypassed to ground with separate 0.1μF ceramic capacitors. 2.2μF tantalum capacitor can be added for better performance. Figure 3. Amplifier with Bypass Capacitors TYPICAL APPLICATION CIRCUITS Differential Amplifier The circuit shown in Figure 4 performs the difference function. If the resistors ratios are equal (R4 / R3 = R2 / R1), then VOUT = (Vp – Vn) × R2 / R1 + VREF. Figure 4. Differential Amplifier FC321SOT 2019. 11. 21 6/8 Revision No : 0 |
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