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WM8195 Datasheet(PDF) 7 Page - Wolfson Microelectronics plc |
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WM8195 Datasheet(HTML) 7 Page - Wolfson Microelectronics plc |
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7 / 31 page  Advanced Information WM8195 w AI Rev 2.0 September 2002 7 INPUT VIDEOSAMPLING MCLK VSMP INPUT VIDEO t PER t MCLKH t MCLKL t VSMPSU t VSMPH t VSU t VH t RSU t RH Figure 1 Input Video Timing Test Conditions AVDD1 = AVDD2 = DVDD1 = DVDD2 = DVDD3 =4.75 to 5.25V, AGND = DGND = 0V, TA =0 to 70 °C, MCLK = 24MHz unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS MCLK period tPER 41.6 ns MCLK high period tMCLKH 18.8 ns MCLK low period tMCLKL 18.8 ns VSMP set-up time tVSMPSU 6ns VSMP hold time tVSMPH 3ns Video level set-up time tVSU 10 ns Video level hold time tVH 3ns Reset level set-up time tRSU 10 ns Reset level hold time tRH 3ns Notes: 1. tVSU and tRSU denote the set-up time required after the input video signal has settled. 2. Parameters are measured at 50% of the rising/falling edge. OUTPUT DATA TIMING MCLK OP[13:0] t PD Figure 2 Output Data Timing |
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