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WM8195 Datasheet(PDF) 8 Page - Wolfson Microelectronics plc |
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WM8195 Datasheet(HTML) 8 Page - Wolfson Microelectronics plc |
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8 / 31 page ![]() WM8195 Advanced Information w AI Rev 2.0 September 2002 8 OEB OP[13:0] t PZE Hi-Z t PEZ Hi-Z Figure 3 Output Data Enable Timing Test Conditions AVDD1 = AVDD2 = DVDD1 = DVDD2 = DVDD3 =4.75 to 5.25V, AGND = DGND = 0V, TA =0 to 70 °C, MCLK = 24MHz unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Output propagation delay tPD IOH =1mA,IOL =1mA 40 ns Output enable time tPZE 20 ns Output disable time tPEZ 15 ns MCLK RLC/ACYC PGA/OFFSET MUX OUTPUT t ACYCSU t ACYCH t ACYCSU t ACYCH Figure 4 Auto Cycle Timing Test Conditions AVDD = DVDD1 = 4.75 to 5.25V, DVDD2 = 2.97 to 3.63V, AGND = DGND = 0V, TA =0 to 70 °C, MCLK = 32MHz unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Auto Cycle set-up time tACYCSU 6 ns Auto Cycle hold time tACYCH 3 ns |
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