LTC4367 datasheet(10/24 Pages) AD

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LTC4381

Rev. 0

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OPERATION

The LTC4381 is a low quiescent current surge stopper that

drives an internal 9mΩ N-channel MOSFET as the pass

device. In normal operation, a 20µA charge pump (see

Block Diagram) drives MOSFET M1 fully on, providing a

low impedance path from input to the load. The MOSFET

gate is clamped to ground by a Zener stack. If the input

voltage rises to the point where the output approaches

the gate clamp, the output is effectively limited to one

threshold voltage (typically 3V) below the gate clamp and

the input surge is blocked from reaching the load.

For the LTC4381-1 and LTC4381-2 versions, two output

clamping voltages to ground are available: 28.5V for use

in 12V systems, and 47V for use in 24V and 28V sys-

tems. The clamping voltage is selectable using the SEL

pin. Besides the output to ground clamp, the output is

also limited to 10.5V above the VCC pin.

There is no GATE clamp to ground for the LTC4381-3

and LTC4381-4 versions and the output is only limited

to 10.5V above the voltage at the VCC pin. A Zener diode

clamp connected from the VCC pin to ground thus clamps

the voltages at both the VCC and SRC pins during over-

voltage events.

Load current is limited by a current limit amplifier (IA),

using a sense resistor in series with the MOSFET source

to monitor the current. The current limit threshold is

50mV, rising to 62mV when the output is less than 1.5V.

MOSFET stress is monitored by a timer, whose current is a

function of MOSFET’s VDS as well as ID. VDS is monitored

by RDRN at the DRN pin, while ID is monitored by sens-

ing the voltage drop across RSNS. The timer allows the

load to continue functioning during short transient events

while protecting the MOSFET from being damaged by a

sustained overvoltage, such as load dump in vehicles, or

an output overload or short circuit.

A multiplier sets the timer period depending on the power

dissipation in the MOSFET. Higher power dissipation cor-

responds to a shorter timer period, helping to keep the

MOSFET within its safe operating area (SOA).

The timer responds to stresses at start-up and during

voltage and current limiting. TMR pin current is integrated

on timing capacitor CTMR and if TMR charges to 1.215V,

the MOSFET is turned off. At this point, the LTC4381-1

and LTC4381-3 latch off, and can be reset by cycling

power or by pulling the ON pin low for at least 100µs.

For the LTC4381-2 and LTC4381-4, the TMR pin enters a

cool down phase, allowing time for the MOSFET tempera-

ture to equalize with its surroundings before automatically

restarting. The TMR pin slowly charges up and down in

between 3.4V and 1.215V for 15 times and discharges to

ground at the last cycle. When the TMR pin has reached

the 100mV threshold, the MOSFET is turned back on. The

cool down interval can be curtailed by pulling the ON pin

low for at least 10ms/µF of CTMR.

In addition to resetting the timer, the ON pin is used for

on/off control and for undervoltage detection. The ON pin

threshold is 1.05V.

The open drain FLT pin pulls low whenever the timer is

faulted off and goes high again when reset by a power

cycle, by pulling the ON pin low for at least 100µs or in

the case of the LTC4381-2 and LTC4381-4, when the TMR

pin discharges to 100mV.

Table 1. LTC4381 Options

PART NUMBER

OUTPUT CLAMP

FAULT BEHAVIOR

LTC4381-1

Internal 28.5V/47V to GND

Latchoff

LTC4381-2

Internal 28.5V/47V to GND

Auto Retry

LTC4381-3

Externally Adjustable

Latchoff

LTC4381-4

Externally Adjustable

Auto Retry

Contact ADI Sales for LTC4381-1/LTC4381-3 option.

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