MAX17823BGCV datasheet(23/121 Pages) MAXIM

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MAX17823B

12-Channel High-Voltage Data Acquisition System

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Acquisition Mode

The host enters the acquisition mode by writing a logic one to the SCAN bit in the SCANCTRL register. This write is

actually an automatic strobe of the bit since SCAN always reads logic zero. In daisy-chained devices, acquisitions

in up-stack devices are delayed by the propagation delay, tPROP, of the command packet through each device. The

acquisition is complete when the device sets the SCANDONE bit. The basic acquisition process is outlined below

with a detailed flowchart in Figure 8.

1. Disable HV charge pump

2. VBLKP conversion, if enabled

3. All enabled cell conversions (first)

a. ascending order (1 through 12) if pyramid mode or

b. descending order (12 through 1) if top-down mode

4. All enabled cell conversions (second)

a. descending order (12 through 1)

5. VBLKP conversion (second), if enabled

6. Diagnostic conversion (first), if enabled

7. Diagnostic conversion (second) if enabled

8. Enable HV charge pump for recovery period unless

a. OVSAMP[2:0] = 0 (no oversampling) or

b. all oversample measurements are complete

9. Repeat steps 1 through 8 until all oversamples are done

10. All enabled auxiliary conversions, ascending order (AUXIN1, AUXIN2)

11. Set SCANDONE bit

Oversampling

Oversampling mode performs multiple measurement cycles in a single acquisition and averages the samples in the

ALU to reduce the measurement noise and effectively increase the resolution of each measurement result. In

oversampling mode, acquisition times are proportional to the number of oversamples as shown in Table 8. The

number of oversamples can be configured from 4 to 128 by OVSAMPL[2:0] as shown in Table 7. The AUXIN

measurements are never oversampled, even in oversampling mode.

To add n bits of measurement resolution requires at least 22n oversamples. Since the ADC resolution is 12 bits, 13-

bit resolution requires at least 4 oversamples and to achieve the maximum 14-bit resolution requires at least 16

oversamples. Therefore with no oversampling, only the higher 12-bits of the measurement are statistically significant

and with 4 or 8 oversamples, only the higher 13 bits are statistically significant. Taking more than 16 oversamples

further reduces the measurement variation.

Of course with no oversampling, measurements can be averaged externally to achieve increased resolution but at

a higher computational cost for the host.

Acquisition Watchdog Timeout

If the acquisition does not finish within a predetermined time interval, the SCANTIMEOUT bit is set, the ADC logic

is reset, the ALU registers are cleared, and the measurement data registers are also cleared. In double-buffer mode

(DBLBUF = 1), the data registers are not cleared, however, once data is moved from the ALU registers to the data

registers, either automatically or manually (with the DATAMOVE bit), then data registers are cleared as a

consequence of the ALU register having been cleared. The acquisition watchdog timeout interval depends on the

oversampling configuration as shown in Table 7.

Table 7. Oversampling

OVSAMPL[2:0]

Oversamples

Theoretical Resolution

Acquisition Watchdog Timeout

000b (default)

12 bits

1.10ms

001b

13 bits

2.08ms

010b

13 bits

3.36ms

011b

14 bits

5.92ms

100b

14 bits

10.99ms

101b

14 bits

21.18ms

110b

128

14 bits

41.56ms

111b

128

14 bits

41.56ms

MAX17823BGCV Datasheet(PDF) 23 Page - Maxim Integrated Products

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