2EDL23 family Datasheet

Please read the Important Notice and Warnings at the end of this document

Version 2.7

www.infineon.com/gdHalfBridge

1 of 21

2020-07-07

2EDL23 family

2EDL23x06PJ family

600 V Half Bridge Gate Driver with OCP and Integrated Bootstrap Diode

Features

•

Infineon thin-film-SOI-technology

•

Fully operational to +600 V

•

•

Floating channel designed for bootstrap operation

•

Output source/sink current capability +1.8 A/-2.5 A

•

Tolerant to negative transient voltage up to -100 V

(Pulse width is up 300 ns) given by SOI-technology

•

Interlock, Enable, Fault, and over current protection

•

10 ns typ., 60 ns max. propagation delay matching

•

dV/dt immune ±50 V

•

Undervoltage lockout for both channels

•

3.3 V, 5 V and 15 V input logic compatible

•

RoHS compliant

Product summary

= 620 V max.

= 1.8 A/2.5 A

= 10 V - 17.5 V

Delay Matching

= 60 ns max.

= 37 ns/48 ns

Package

DSO-14

Potential applications

• Motor drives, general purpose inverters

• Refrigeration compressors, home appliance

• Half-bridge and full-bridge converters in offline AC-DC power supplies for telecom and lighting

Product validation

Qualified for industrial applications according to the relevant tests of JEDEC47/20/22.

Description

The 2EDL family contains devices, which control power devices like MOS-transistors or IGBTs with a maximum blocking

voltage of +600 V in half bridge configurations. Based on the used SOI-technology there is an excellent ruggedness on

transient voltages. No parasitic thyristor structures are present in the device. Hence, no parasitic latch up may occur at all

temperature and voltage conditions.

The two independent driver outputs are controlled at the low-side using two different CMOS resp. LSTTL compatible

signals, down up to 3.3 V logic. The device includes an under-voltage detection unit with hysteresis characteristic which

are optimised either for IGBT or MOSFET.

Those parts, which are designed for IGBT have asymmetric undervoltage lockout levels, which support strongly the

integrated ultra-fast bootstrap diode. Additionally, the offline gate clamping function provides an inherent protection of

the transistors for parasitic turn-on by floating gate conditions, when the IC is not supplied via VDD.

LIN

HO

VS

LO

PGND

To

Load

GND

HIN

+ DC-Bus

GND

- DC-Bus

2EDL23x06PJ

EN-

/FLT

To Opam p /

Comparator

VDD

VB

EN

/CTRAP

PWM_H

PWM_L

GND

+5 V

Figure 1

Typical application diagram

Refer to lead assignments for

correct pin configuration. This

diagram show electrical

connections only. Please refer to

our application notes and design

tips for proper circuit board

layout.