TAS5828M datasheet(13/83 Pages) TI

13 / 83 page

8 Detailed Description

8.1 Overview

The TAS5828M device combines 4 main building blocks into a single cohesive device that maximizes sound

quality, flexibility, and ease of use. The 4 main building blocks are listed as follows:

• A stereo digital to PWM modulator.

• An Audio DSP subsystem.

• A flexible close-loop amplifier capable of operating in stereo or mono, at several different switching

frequencies, and with a variety of output voltages and loads.

• An I2C control port for communication with the device

The device requires only two power supplies for proper operation. A DVDD supply is required to power the

low voltage digital circuitry. Another supply, called PVDD, is required to provide power to the output stage of

the audio amplifier. Two internal LDOs convert PVDD to 5 V for GVDD and AVDD and to 1.5 V for DVDD

respectively.

8.2 Functional Block Diagram

1.5V Regulator

(For Digital Core)

5V Regulator

(Internal Gate Drive

Serial

Audio

Port

SCLK

LRCLK

SDIN

Flexible

Process Flow

…

CDSP

Analog

PWM

Modulator

DAC

I -> V

Analog Gain Setting

DAC

Gate

Drives

Gate

Drives

Full Bridge

Power

Stage A

Full Bridge

Power

Stage B

Output

Current

Monitoring

(OC protection)

Internal Control Registers and State Machines

OUT_A+

OUT_A-

OUT_B+

OUT_B-

SDOUT

PDN

ADR/HW_MODE

SCL/HW_SEL0

SDA/HW_SEL1

Clock Monitoring

and Error Protection

Error Reporting

Die Temperature Monitoring

and UV/OV/OT Protection

Closed Loop Class D Amplifier

Internal Voltage Supplies

5V Regulator

( Analog Power Supply )

GPIO0/FAULT

GPIO1/PWM_CTRL

GPIO2/SDOUT

8.3 Feature Description

8.3.1 Power Supplies

For system design, TAS5828M needs a 3.3-V or 1.8-V supply in addition to the (typical) 12 V or 24 V power-

stage supply. Two internal voltage regulators provide suitable voltage levels for the gate drive circuitry and

internal circuitry. The external pins are provided only as a connection point for off-chip bypass capacitors to

filter the supply. Connecting external circuitry to these regulator outputs may result in reduced performance and

damage to the device. Additionally, all circuitry requiring a floating voltage supply, that is, the high-side gate

drive, is accommodated by built-in bootstrap circuitry requiring only a few external capacitors. To provide good

electrical and acoustical characteristics, the PWM signal path for the output stage is designed as identical,

independent half-bridges. For this reason, each half-bridge has separate bootstrap pins (BST_x). The gate drive

voltages (GVDD) are derived from the PVDD voltage. Special attention should be paid to placing all decoupling

capacitors as close to their associated pins as possible. In general, inductance between the power-supply

pins and decoupling capacitors must be avoided. For a properly functioning bootstrap circuit, a small ceramic

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TAS5828M

SLASEX7 – JUNE 2021

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