MAX110 Evaluation System/Evaluation Kit

16

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Figure 8. 80C32 Module Schematic

1

11

P1.0-P1.7

27-34

1

2

3

4

5

6

7

8

10

11

12

13

14

15

16

17

9

18

19

29

C1 27pF

XX1 11.059MHz

C2

27pF

39

38

37

36

35

34

33

32

30

31

28

27

26

25

24

23

22

21

14

13

12

11

10

9

8

15

0

1

2

3

4

5

6

7

2

3

4

5

6

7

8

9

19

18

17

16

15

14

13

12

D1

D8

Q1

Q8

P1.0

AD0

P1.1

AD1

P1.2

AD2

P1.3

AD3

P1.4

AD4

P1.5

AD5

P1.6

AD6

P1.7

AD7

RXD

ALE

TXD

-EA

-INT0

A15

-INT1

A14

T0

A13

T1

A12

-WR

A11

-RD

A10

RST

-PSEN

XTAL1

A9

XTAL2

A8

0

1

2

3

4

5

6

7

ALL D9 MNEMONICS REFER

TO THE HOST (DTE)

5

GND

1

DCD

4

DTR

6

DSR

2

TXD

3

RXD

7

RTS

8

CTS

5

18

4

19

11

15

10

16

6

C2+

C2+

C2-

C2-

GND GND

C1+

C1-

V-

V-

V+

2

1

3

20

8

13

12

17

14

9

MAX233A

U2

MAX707

U10

1

2

3

4

MR

GND

PFI

RESET

RESET

N.C.

PFO

8

7

6

5

SW1

RESET

U6 HCT08

U6 HCT08

U6 HCT08

U6 HCT08

D

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

74HCT

573

U4

11

12

13

15

16

17

18

19

10

9

8

7

6

5

4

3

O0

O1

O2

O3

O4

O5

O6

O7

A0

A1

A2

A3

A4

A5

A6

A7

+5V

25

24

21

23

2

26

A8

A9

A10

A11

A12

N.C./A13

22

20

C

E

1

27

PCM

8

9

10

11

12

13

4

5

6

7

0

1

2

3

A0

A1

EN

2

3

1

14

15

+5V

+5V

U5

HCT139

27C64

U3

9

10

8

12

13

11

4

5

6

1

2

3

2

+5V

+5V

34

27

+5V