PCIMX6D4AVT12AD datasheet(1/170 Pages) NXP

Part #	PCIMX6D4AVT12AD

Description	i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors

PDF	170 Pages

Scroll/Zoom	100%

Manufacturer	NXP [NXP Semiconductors]

Direct Link	http://www.nxp.com

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1 / 170 page

NXP Semiconductors

Data Sheet: Technical Data

Document Number: IMX6DQAEC

Rev. 6, 11/2018

Package Information

FCPBGA Package

21 x 21 mm, 0.8 mm pitch

NXP Reserves the right to change the production detail specifications as may be

required to permit improvements in the design of its products.

Ordering Information

See Table 1

MCIMX6QxAxxxxC

MCIMX6QxAxxxxD

MCIMX6QxAxxxxE

MCIMX6DxAxxxxC

MCIMX6DxAxxxxD

MCIMX6DxAxxxxE

1

Introduction

The i.MX 6Dual/6Quad automotive and infotainment

processors represent the latest achievement in integrated

multimedia applications processors. These processors

are part of a growing family of multimedia-focused

products that offer high-performance processing with a

high degree of functional integration. These processors

target the needs of the growing automotive infotainment,

telematics, HMI, and display-based cluster markets.

The i.MX 6Dual/6Quad processors feature advanced

implementation of the quad Arm® Cortex®-A9 core,

which operates at speeds up to 1 GHz. They include 2D

and 3D graphics processors, 1080p video processing,

and integrated power management. Each processor

provides a 64-bit DDR3/DDR3L/LPDDR2 memory

interface and a number of other interfaces for connecting

peripherals, such as WLAN, Bluetooth®, GPS, hard

drive, displays, and camera sensors.

The i.MX 6Dual/6Quad processors are specifically

useful for applications such as the following:

•

Automotive navigation and entertainment

i.MX 6Dual/6Quad

Automotive and

Infotainment Applications

Processors

1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.3

Signal Naming Convention . . . . . . . . . . . . . . . . . . . 8

2

Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.1

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3

Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.1

Special Signal Considerations. . . . . . . . . . . . . . . . 19

3.2

Recommended Connections for Unused Analog

Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4

Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 20

4.1

Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . . 20

4.2

Power Supplies Requirements and Restrictions . . 33

4.3

Integrated LDO Voltage Regulator Parameters . . 34

4.4

PLL Electrical Characteristics . . . . . . . . . . . . . . . . 36

4.5

On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . . 37

4.6

I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 38

4.7

I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 44

4.8

Output Buffer Impedance Parameters. . . . . . . . . . 49

4.9

System Modules Timing . . . . . . . . . . . . . . . . . . . . 53

4.10 Multi-Mode DDR Controller (MMDC). . . . . . . . . . . 64

4.11 General-Purpose Media Interface (GPMI) Timing. 64

4.12 External Peripheral Interface Parameters . . . . . . . 73

5

Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . 138

5.1

Boot Mode Configuration Pins. . . . . . . . . . . . . . . 138

5.2

Boot Devices Interfaces Allocation . . . . . . . . . . . 139

6

Package Information and Contact Assignments . . . . . . 141

6.1

Signal Naming Convention . . . . . . . . . . . . . . . . . 141

6.2

21 x 21 mm Package Information . . . . . . . . . . . . 141

7

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164

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