AT25SF641 datasheet(33/76 Pages) DIALOG

Part #	AT25SF641

Description	64-Mbit, 2.7V Minimum SPI Serial Flash Memory with Dual I/O, Quad I/O and QPI Support

PDF	76 Pages

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Manufacturer	DIALOG [Dialog Semiconductor]

Direct Link	http://www.dialog-semiconductor.com/

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33 / 76 page

AT25SF641

DS-25SF641–111E–3/2018

7.16

Quad Page Program (33h)

The Quad Page Program instruction is to program the memory as being “0” at previously erased memory areas. The Quad

Page Program takes four pins: IO0, IO1, IO2 and IO3 as address and data input, which can improve programmer performance

and the effectiveness of application of lower clock less than 5MHz. Systems using faster clock speeds will not get more benefit

for the Quad Page Program as the required internal page program time is far more than the time data clock-in.

To use Quad Page Program, the Quad Enable bit must be set, A Write Enable instruction must be executed before the

device will accept the Quad Page Program instruction (Status Register-1, WEL=1). The instruction is initiated by driving

the CS pin low then sending the instruction code “33h” with following a 24-bit address (A23-A0) and at least one data,

into the IO pins. The CS pin must be held low for the entire length of the instruction while data is being sent to the device.

All other functions of Quad Page Program are perfectly same as standard Page Program. (Please refer to Figure 7-

24 and Figure 7-25).

Figure 7-24. Quad Page Program Instruction (SPI mode)

AT25SF641 Datasheet(PDF) 33 Page - Dialog Semiconductor