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ZL30264 Datasheet(PDF) 34 Page - Microchip Technology

Part # ZL30264
Description  2-APLL, 6- or 10-Output Any-to-Any Clock Multiplier and Frequency Synthesizer
PDF  93 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

ZL30264 Datasheet(HTML) 34 Page - Microchip Technology

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ZL30264-ZL30267
Data Sheet
34
© 2021 Microchip Technology Inc.
DS20006555A
ADDR
REGISTER
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
APLL1 Fractional Divider Registers
140
F1CR1
MODE[3:0]
—
FDL[2:0]
141
F1DIV1
FDIV[7:0]
142
F1DIV2
FDIV[15:8]
143
F1DIV3
FDIV[23:16]
144
F1DIV4
FDIV[31:24]
145
F1DIV5
FDIV[39:32]
146
F1DEN1
FDEN[7:0]
147
F1DEN2
FDEN[15:8]
148
F1DEN3
FDEN[23:16]
149
F1DEN4
FDEN[31:24]
14A
F1REM1
FREM[7:0]
14B
F1REM2
FREM[15:8]
14C
F1REM3
FREM[23:16]
14D
F1REM4
FREM[31:24]
14E
F1BP
—
—
FBP[5:0]
APLL2 Registers
180
A2CR1
same as APLL1 registers
…
…
186
A2FBDIV1
…
…
19C
A2ID4
APLL2 Fractional Divider Registers
1C0
F2CR1
same as APLL1 fractional divider registers
…
…
1CE
F2BP
Output Clock Configuration Registers
OC1 Registers
200
OC1CR1
PHEN
MSDIV[6:0]
201
OC1CR2
—
POL
DRIVE[1:0]
OCSF[3:0]
202
OC1DIFF
VCM[3:0]
VOD[3:0]
203
OC1REG
—
—
—
—
VREG[3:0]
204
OC1CR3
SRLSEN
—
NEGLSD
LSSEL
—
ASQUEL
—
LSDIV[24]
205
OC1DIV1
LSDIV[7:0]
206
OC1DIV2
LSDIV[15:8]
207
OC1DIV3
LSDIV[23:16]
208
OC1DC
OCDC[7:0]
209
OC1PH
—
—
—
—
PHADJ[3:0]
20A
OC1STOP
—
SRC[3:0]
NEGLSD
MODE[1:0]
OC2 Registers
210
OC2CR1
same as OC1 registers
…
…
21A
OC2STOP
OC3 Registers
220
OC3CR1
same as OC1 registers
…
…
22A
OC3STOP
OC4 Registers
230
OC4CR1
same as OC1 registers



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