AM79C978AVCW datasheet(159/256 Pages) AMD

159 / 256 page

Am79C978A

159

This bit is read accessible al-

ways, write accessible only when

either the STOP or the SPND bit

is set. EEN is set to 0 by

H_RESET and is unaffected by

the S_RESET or STOP bit.

RES

Reserved location. Written as

zero and read as undefined.

ECS

EEPROM Chip Select. This bit is

used to control the value of the

EECS pin of the interface when

the EEN bit is set to 1 and the

PREAD bit is set to 0. If EEN = 1

and PREAD = 0 and ECS is set to

a 1, then the EECS pin will be

forced to a HIGH level at the rising

edge of the next clock following bit

programming.

If EEN = 1 and PREAD = 0 and

ECS is set to a 0, then the EECS

pin will be forced to a LOW level

at the rising edge of the next

clock following bit programming.

ECS has no effect on the output

value of the EECS pin unless the

PREAD bit is set to 0 and the

EEN bit is set to 1.

This bit is read accessible al-

ways, write accessible only when

either the STOP or the SPND bit

is set. ECS is set to 0 by

H_RESET and is not affected by

S_RESET or STOP.

Table 39.

EEDET Setting

Table 40.

Interface Pin Assignment

EEDET Value

(BCR19[13])

EEPROM

Connected?

Result if PREAD is Set to 1

Result of Automatic EEPROM Read

Operation Following H_RESET

EEPROM read operation is attempted.

Entire read sequence will occur, checksum

failure will result, PVALID is reset to 0.

First two EESK clock cycles are generated,

then EEPROM read operation is aborted

and PVALID is reset to 0.

Yes

EEPROM read operation is attempted.

Entire read sequence will occur, checksum

operation will pass, PVALID is set to 1.

First two EESK clock cycles are generated,

then EEPROM read operation is aborted

and PVALID is reset to 0.

EEPROM read operation is attempted.

Entire read sequence will occur, checksum

failure will result, PVALID is reset to 0.

EEPROM read operation is attempted.

Entire read sequence will occur, checksum

failure will result, PVALID is reset to 0.

Yes

EEPROM read operation is attempted.

Entire read sequence will occur, checksum

operation will pass, PVALID is set to 1.

EEPROM read operation is attempted.

Entire read sequence will occur, checksum

operation will pass, PVALID is set to 1.

RST Pin

PREAD or Auto

Read in Progress

EEN

EECS

EESK

EEDI

Low

Tri-State

High

Active

High

From ECS

Bit of BCR19

From ESK Bit of

BCR19

From EEDI Bit of

BCR19

High

LED1

LED0

AM79C978AVCW Datasheet(PDF) 159 Page - Advanced Micro Devices

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