AM79C978AVCW datasheet(148/256 Pages) AMD

148 / 256 page

148

Am79C978A

LED1 register is disabled. Writes to those registers will

be ignored.

Note: Bits 15-0 in this register are programmable

through the EEPROM.

Bit

Name

Description

31-16 RES

Reserved locations. Written as

zeros and read as undefined.

LEDOUT

This bit indicates the current

(non-stretched)

value

the

LED output pin. A value of 1 in

this bit indicates that the OR of

the enabled signals is true.

The logical value of the LEDOUT

status signal is determined by the

settings of the individual Status

Enable bits of the LED register

(bits 8 and 6-0).

This bit is always read accessi-

ble. This bit is read only; writes

have no effect. LEDOUT is unaf-

fected by H_RESET, S_RESET,

or STOP.

LEDPOL

LED Polarity. When this bit has

the value 0, then the LED pin

will be driven to a LOW level

whenever the OR of the enabled

signals is true, and the LED pin

will be disabled and allowed to

float high whenever the OR of

the enabled signals is false (i.e.,

the LED output will be an Open

Drain output and the output val-

ue will be the inverse of the

LEDOUT status bit).

When this bit has the value 1,

then the LED pin will be driven to

a HIGH level whenever the OR of

the enabled signals is true, and

the LED pin will be driven to a

LOW level whenever the OR of

the enabled signals is false (i.e.,

the LED output will be a Totem

Pole output and the output value

will be the same polarity as the

LEDOUT status bit).

The setting of this bit will not ef-

fect the polarity of the LEDOUT

bit for this register.

This bit is always read/write ac-

cessible. LEDPOL is cleared by

H_RESET and is not affected

by S_RESET or setting the

STOP bit.

LEDDIS

LED Disable. This bit is used to

disable the LED output. When

LEDDIS has the value 1, then the

LED output will always be dis-

abled. When LEDDIS has the val-

ue 0, then the LED output value

will be governed by the LEDOUT

and LEDPOL values.

This bit is always read/write ac-

cessible. LEDDIS is cleared by

H_RESET and is not affected

by S_RESET or setting the

STOP bit.

100E

100 Mbps Enable. When this bit

is set to 1, a value of 1 is passed

to the LEDOUT bit in this register

when the Am79C978A controller

is operating at 100 Mbps mode.

This bit is always read/write ac-

cessible. 100E is cleared by

H_RESET and is not affected

by S_RESET or setting the

STOP bit.

11-10 RES

Reserved locations. Written and

read as zeros.

MPSE

Magic Packet Status Enable.

When this bit is set to 1, a value of

1 is passed to the LEDOUT bit in

this register when Magic Packet

mode is enabled and a Magic

Packet frame is detected on the

network.

This bit is always read/write ac-

cessible. MPSE is cleared by

H_RESET and is not affected

by S_RESET or setting the

STOP bit.

FDLSE

Full-Duplex Link Status Enable.

Indicates the Full-Duplex Link

Test Status. When this bit is

set, a value of 1 is passed to

the LEDOUT signal when the

Am79C978A controller is func-

tioning in a Link Pass state and

full-duplex

operation

en-

abled. When the Am79C978A

controller is not functioning in a

Link Pass state with full-duplex

AM79C978AVCW Datasheet(PDF) 148 Page - Advanced Micro Devices

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