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AM79C978AVCW Datasheet(PDF) 151 Page - Advanced Micro Devices

Part # AM79C978AVCW
Description  Single-Chip 1/10 Mbps PCI Home Networking Controller
PDF  256 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C978AVCW Datasheet(HTML) 151 Page - Advanced Micro Devices

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Am79C978A
151
This bit is always read/write ac-
cessible. PSE is set to 1 by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
6
LNKSE
Link Status Enable. When this bit
is set, a value of 1 will be passed
to the LEDOUT bit in this register
in Link Pass state.
This bit is always read/write ac-
cessible. LNKSE is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
5
RCVME
Receive Match Status Enable.
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network that has
passed the address match func-
tion for this node. All address
matching modes are included:
physical, logical filtering, broad-
cast, and promiscuous.
This bit is always read/write ac-
cessible. RCVME is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
4
XMTE
Transmit Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is transmit
activity on the network.
This bit is always read/write ac-
cessible. XMTE is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
3
POWER
Power. When this bit is set to 1,
the device is operating in HIGH
power mode.
2
RCVE
Receive Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive
activity on the network.
This bit is always read/write ac-
cessible. RCVE is set to 1 by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
1
SPEED
Speed. When this bit is set to 1,
the device is operating in HIGH
speed mode.
0
COLE
Collision Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is collision
activity on the network.
This bit is always read/write ac-
cessible. COLE is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
BCR7: LED3 Status
BCR7 controls the function(s) that the LED3 pin dis-
plays. Multiple functions can be simultaneously enabled
on this LED pin. The LED display will indicate the logical
OR of the enabled functions. BCR7 defaults to Transmit
Status (XMT) with pulse stretcher enabled (PSE = 1)
and is fully programmable.
Note: When LEDPE (BCR2, bit 12) is set to 1, pro-
gramming of the LED3 Status register is enabled.
When LEDPE is cleared to 0, programming of the
LED3 register is disabled. Writes to those registers will
be ignored.
Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15
LEDOUT
This bit indicates the current
(non-stretched) value of the LED
output pin. A value of 1 in this bit
indicates that the OR of the en-
abled signals is true.
The logical value of the LEDOUT
status signal is determined by the
settings of the individual Status
Enable bits of the LED register
(bits 8 and 6-0).
This bit is read accessible al-
ways. This bit is read only; writes
have no effect. LEDOUT is unaf-
fected by H_RESET, S_RESET,
or STOP.



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