AM79C978AVCW datasheet(152/256 Pages) AMD

152 / 256 page

152

Am79C978A

LEDPOL

LED Polarity. When this bit has

the value 0, then the LED pin will

be driven to a LOW level whenev-

er the OR of the enabled signals

is true, and the LED pin will be

disabled and allowed to float high

whenever the OR of the enabled

signals is false (i.e., the LED out-

put will be an Open Drain output

and the output value will be the

inverse of the LEDOUT status

bit.).

When this bit has the value 1,

then the LED pin will be driven to

a HIGH level whenever the OR of

the enabled signals is true, and

the LED pin will be driven to a

LOW level whenever the OR of

the enabled signals is false (i.e.,

the LED output will be a Totem

Pole output and the output value

will be the same polarity as the

LEDOUT status bit).

The setting of this bit will not ef-

fect the polarity of the LEDOUT

bit for this register.

This bit is always read/write ac-

cessible. LEDPOL is cleared by

H_RESET and is not affected

by S_RESET or setting the

STOP bit.

LEDDIS

LED Disable. This bit is used to

disable the LED output. When

LEDDIS has the value 1, then the

LED output will always be dis-

abled. When LEDDIS has the val-

ue 0, then the LED output value

will be governed by the LEDOUT

and LEDPOL values.

This bit is always read/write ac-

cessible. LEDDIS is cleared by

H_RESET and is not affected

by S_RESET or setting the

STOP bit.

100E

100 Mbps Enable. When this bit

is set to 1, a value of 1 is passed

to the LEDOUT bit in this register

when the Am79C978A controller

is operating at 100 Mbps mode.

This bit is always read/write ac-

cessible. 100E is cleared by

H_RESET and is not affected

by S_RESET or setting the

STOP bit.

11-10 RES

Reserved locations. Written and

read as zeros.

MPSE

Magic Packet Status Enable.

When this bit is set to 1, a value of

1 is passed to the LEDOUT bit in

this register when magic frame

mode is enabled and a magic

frame is detected on the network.

This bit is always read/write ac-

cessible. MPSE is cleared by

H_RESET and is not affected

by S_RESET or setting the

STOP bit.

FDLSE

Full-Duplex Link Status Enable. In-

dicates the Full-Duplex Link Test

Status. When this bit is set, a value

of 1 is passed to the LEDOUT sig-

nal when the Am79C978A control-

ler is functioning in a Link Pass

state and full-duplex operation is

enabled. When the Am79C978A

controller is not functioning in a

Link Pass state with full-duplex op-

eration being enabled, a value of 0

is passed to the LEDOUT signal.

This bit is always read/write ac-

cessible. FDLSE is cleared by

H_RESET and is not affected

by S_RESET or setting the

STOP bit.

PSE

Pulse Stretcher Enable. When

this bit is set, the LED illumination

time is extended for each new oc-

currence of the enabled function

for this LED output. A value of 0

disables the pulse stretcher.

This bit is always read/write ac-

cessible. PSE is set to 1 by

H_RESET and is not affected

by S_RESET or setting the

STOP bit.

LNKSE

Link Status Enable. When this bit

is set, a value of 1 will be passed

to the LEDOUT bit in this register

in Link Pass state.

This bit is always read/write ac-

cessible. LNKSE is cleared by

H_RESET and is not affected

AM79C978AVCW Datasheet(PDF) 152 Page - Advanced Micro Devices

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