ADL5960

Preliminary Technical Data

Rev. PrB | Page 6 of 11

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1

3

4

AVCC

NOTES

1. EXPOSED PAD. THE EXPOSED PAD (EPAD) ON THE UNDERSIDE OF THE DEVICE IS ALSO

INTERNALLY CONNECTED TO GROUND AND REQUIRES GOOD THERMAL AND

ELECTRICAL CONNECTION TO THE GROUND OF THE PRINTED CIRCUIT BOARD (PCB).

CONNECT ALL GROUND PINS TO A LOW IMPEDANCE GROUND PLANE TOGETHER WITH THE EPAD.

RFIN

2

AGND

AGND

5

CAP

6

IFFM

7

IFFP

8

OVCC

9 10 11 12 13

26 25 24 23 22

21

19

18

TEMP

RFOUT

20

AGND

AGND

17

VCM

16

IFRM

15

IFRP

14

OVCC

ADL5960

TOP VIEW

(Not to Scale)

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

AVCC

Analog Supply Pin. Bypass AVCC with 1 nF and a 4.7 μF capacitors placed as close as possible to AVCC.

2, 4, 18, 20

AGND

Analog Ground Pins. All ground pins are internally connected. Use Pin 2 and Pin 4 as the RF return ground

for the RFIN transmission line (Pin 3). Use Pin 18 and Pin 20 as the RF return ground for the RFOUT

transmission line (Pin 19).

3, 19

RFIN, RFOUT

RF Input/Output of the Primary Transmission Line. RFIN and RFOUT have a 50 Ω load characteristic

impedance and can dc-couple to a source and load. When using open and short terminations, do not

exceed the maximum power dissipation ratings.

5

CAP

Bypass Capacitor. A 4.7 nF capacitor is recommended for 10 MHz operation.

6, 7, 15, 16

IFFM, IFFP, IFRP, IFRM

Differential IF Outputs. Couple Pin 6 and Pin 7 to the forward power transfer (RFIN to RFOUT). Couple

Pin 15 and Pin 16 to the reverse power transfer (RFOUT to RFIN).

8, 14

OVCC

IF Amplifier Supplies. Bypass OVCC with a 1 nF and a 4.7 μF capacitor on each pin before connecting

to AVCC. Place the capacitors as close as possible to OVCC.

9, 10

LOP, LOM

Down Conversion Mixer LO Input/Output. A differential or single-ended signal source can drive the

LOP and LOM pins. The LOMODE register and THRU register configure the LO interface.

11

SYNC

Synchronization Input. This CMOS input pin stops the dividers in the LO and IF input interfaces when

driven high and initiates synchronization when driven back low. If the SYNC pin is floating, an

internal 200 kΩ pull-down resistor disables the SYNC function.

12, 13

OFP, OFM

IF Offset Reference Frequency Inputs. The OFP and OFM pins set the center frequency at the IF

outputs when IFMODE = 0x0, 0x1, or 0x2. Note that, IFMODE = 0x3 disables this input.

17

VCM

IF Output Common-Mode Voltage Control. The VCM pin sets the output common-mode voltage at

IFFM, IFFP, IFRP, and IFRM.

21

TEMP

Temperature Sensing Diode. The TEMP pin connects to the anode of a diode and measures the die

temperature by forcing a current and measuring the voltage.

22

OVDD

SPI Supply Voltage.

23

SDIO

SPI Data Input/Output. If the SDIO pin is floating, an internal 200 kΩ pull-down resistor ties the pin to

a low impedance ground plane.

24

CS

SPI Chip Select (Active Low). If the CS pin is floating, an internal 200 kΩ pull-up resistor ties the pin to

OVDD.

25

SCK

SPI Clock Input. If the SCK pin is floating, an internal 200 kΩ pull-down resistor ties the pin to a low

impedance ground plane.

26

EN

Chip Enable. A logic high at the EN pin enables the chip. A logic low at the EN pin shuts down the

ADL5960. If the EN pin is floating, an internal 200 kΩ pull-down resistor disables the ADL5960.

EPAD

Exposed Pad. The exposed pad (EPAD) on the underside of the device is also internally connected to

ground and requires good thermal and electrical connection to the ground of the printed circuit

board (PCB). Connect all ground pins to a low impedance ground plane together with the EPAD.