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LTC4367 Datasheet(PDF) 15 Page - Analog Devices

Part # LTC4367
Description  65V Dual Electronic Circuit Breaker with Current Monitors
PDF  22 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC4367 Datasheet(HTML) 15 Page - Analog Devices

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LTC4249
15
Rev. 0
For more information www.analog.com
shown in Figure 15. Step response as shown on the front
page is clean with a rise time of about 10µs.
CROSSOVER
LOOP GAIN
PHASE
FREQUENCY (Hz)
1
10
100
1k
10k
100k
–20
0
20
40
60
80
–180
–135
–90
–45
0
4249 F15
Figure 15. Compensated Loop Gain and Phase
(ZF = 1/sCF, CF = 330pF)
When COUT is large (closer to 100µF), phase margin may
be lower compared to the 10µF example. With large COUT,
another loop term should be considered for its phase
margin impact. During step changes in load current, the
LTC4249 current monitor output lags load current briefly.
Transport lag results in phase erosion that is a function of
frequency but does not impact the loop gain magnitude.
The phase erosion is equal to 360° • f • T, where T ≈ 2µs.
At the crossover frequency f = 10kHz, phase margin loss
due to transport lag is –7.2°.
In a low phase margin situation, a lead-lag network may
be required to control the step response. Adding a resis-
tor (RZ) in series with CF provides a leading zero and a
small capacitor (CP) around RZ provides a lagging pole
to restore high frequency roll-off (Figure 16). For analysis
purposes, simply condense the compensation network
around the op amp into a ZF impedance and use the model
in Figure 14 to obtain the new loop gain and phase (add
the transport lag loss term to the phase as needed).
VM
VC
RM
10k
CF
330pF
RZ
20k
CP
33pF
VO
4249 F16
Figure 16. Lead-Lag Network Example
RF PA Bias Sequencing
Some RF PAs have a strict bias sequence order. Use the
LTC4249 EN inputs, RDY outputs and IMON outputs to
simplify the sequencing process. A recommended bias
sequence during power up is the following:
1) Start with the PA VDD near ground. To achieve this,
begin with EN low (ECB off, OUT near ground). Drive
the PA VGG to a suitably negative voltage to guarantee
PA BIAS current = 0. RDY should be pulling low at this
time.
2) Raise EN above threshold (0.8V). The LTC4249 enters
its current limited operating phase and charges the
OUT capacitance with 1A. After 300µs, OUT is checked
for voltage above 1.2V. If it is less, the channel output
is deemed to be “shorted” and the corresponding ECB
shuts off. Assuming no short, the LTC4249 completes
current limited operating phase after 10ms and begins
low RON operation. RDY is now released and may be
pulled high. OUT voltage should now be close to IN.
3) After RDY release, increase PA VGG voltage until desired
BIAS current is achieved. BIAS current may be inferred
from the voltage at the IMON output.
4) Apply RFIN signal.
APPLICATIONS INFORMATION



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