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ICS671-15 Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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ICS671-15 Datasheet(HTML) 2 Page - Integrated Circuit Systems |
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2 / 6 page ![]() ZERO DELAY, LOW SKEW BUFFER MDS 671-15 B 2 Revision 021904 In te gr ated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 ● tel (4 08) 297-1 201 ● www.icst.com ICS671-15 Pin Assignment Pin Descriptions 20 1 19 2 18 33M_IN 66M_IN 3 17 VDD 4 16 OE5 OE6 5 15 GND 6 VDD 7 66M_CPUOUT1 8 GND VDD GND VDD OE4 9 10 OE3 OE1 GND 24 23 22 21 24-pin (173 mil) TSSOP 14 13 11 12 OE2 66M_CPUOUT2 33M_PCIOUT4 33M_PCIOUT3 33M_PCIOUT2 33M_PCIOUT1 66M_AGPOUT1 66M_AGPOUT2 Pin Number Pin Name Pin Type Pin Description 1 33M_IN Input Connect this pin to a 33 MHz input clock. 2 VDD Power Connect to +3.3 V. 3 OE5 Input Output Enable control pin for outputs 66M_CPUOUT2. This pin is active high and tri-states the outputs when low. 4 GND Power Connect to ground. 5 66M_CPUOUT1 Output 66 MHz output clock. 6 66M_CPUOUT2 Output 66 MHz output clock. 7 VDD Power Connect to +3.3 V. 8 VDD Power Connect to +3.3 V. 9 OE3 Input Output Enable control pin for output 33M_PCIOUT4. This pin is active high and tri-states the outputs when low. 10 33M_PCIOUT4 Output 33 MHz output clock. 11 33M_PCIOUT3 Output 33 MHz output clock. 12 OE2 Input Output Enable control pin for output 33M_PCIOUT3. This pin is active high and tri-states the outputs when low. 13 33M_PCIOUT2 Output 33 MHz output clock. |
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