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ICS810-06 Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS810-06 Datasheet(HTML) 1 Page - Integrated Circuit Systems |
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1 / 14 page ![]() 81006AK www.icst.com/products/hiperclocks.html REV. A JANUARY 4, 2006 1 Integrated Circuit Systems, Inc. ICS81006 VCXO-TO-6 LVCMOS OUTPUTS VCXO 0: ÷1 1: ÷2 SYNC SYNC LP Filter GENERAL DESCRIPTION The ICS81006 is a high performance, low jitter/low phase noise VCXO and is a member of the HiPerClockS™ family of high performance clock solutions from ICS. The ICS81006 works in conjunction with a pullable crystal to generate an output clock over the range of 12MHz - 40MHz and has 6 LVCMOS outputs, effectively integrating a fanout buffer function. The frequency of the VCXO is adjusted by the VC control voltage input. The output range is ±100ppm around the nominal crystal frequency. The VC control voltage range is 0 - V DD. The device is packaged in a small 4mm x 4mm VFQFN package and is ideal for use on space constrained boards typically encountered in ADSL/ VDSL applications. FEATURES • Six LVCMOS/LVTTL outputs, 20Ω nominal output impedance • Output Q5 can be selected for ÷1 or ÷2 frequency relative to the crystal frequency • Output frequency range: 12MHz to 40MHz • Crystal pull range: ± 90ppm (typical) • Synchronous output enable places outputs in High-Z state • On-chip filter on VIN to suppress noise modulation of VCXO • V DD/VDDO combinations 3.3V/3.3V 3.3V/2.5V 3.3V/1.8V 2.5V/2.5V 2.5V/1.8V • 4mm x 4mm 20 Lead VFQFN package is ideal for space constrained designs • 0°C to 70°C ambient operating temperature • Available in both standard and lead-free RoHS compliant packages HiPerClockS™ ICS BLOCK DIAGRAM PIN ASSIGNMENT OE0 VC XTAL_IN XTAL_OUT DIV_SEL_Q5 OE1 Q0 Q1 Q2 Q3 Q4 Q5 (Pullup) (Pulldown) XTAL_IN XTAL_OUT VDD VC DIV_SEL_Q5 GND Q2 VDDO Q3 GND 1 2 3 4 5 20 19 18 17 16 ICS81006 20-Lead VFQFN 4mm x 4mm x 0.95 package body K Package Top View 6 7 8 9 10 15 14 13 12 11 (Pullup) |
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