LTC5597

21

Rev. 0

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Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications

subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

PACKAGE DESCRIPTION

2.00

±0.10

(4 SIDES)

NOTE:

1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

0.40

±0.10

0.50

±0.10

BOTTOM VIEW—EXPOSED PAD

0.20

±0.10

0.75

±0.05

R = 0.115

TYP

1.55

±0.10

(2 SIDES)

1

4

8

5

PIN 1 BAR

TOP MARK

(SEE NOTE 6)

0.200 REF

0.00 – 0.05

(DC) DFN 0616 REV A

0.23

±0.05

0.50 BSC

0.25

±0.05

1.60

±0.05

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

0.25

±0.05

1.15

±0.05

0.70

±0.05

2.55

±0.05

PACKAGE OUTLINE

0.50 BSC

PIN 1 NOTCH

R = 0.15

DC Package

8-Lead Plastic DFN (2mm

× 2mm), Flip Chip

(Reference LTC DWG # 05-08-1957 Rev A)