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AT90USB646 Datasheet(PDF) 163 Page - ATMEL Corporation |
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AT90USB646 Datasheet(HTML) 163 Page - ATMEL Corporation |
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163 / 434 page ![]() 163 7593A–AVR–02/06 AT90USB64/128 Table 15-5 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to fast PWM mode. Note: 1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com- pare Match is ignored, but the set or clear is done at TOP. See “Fast PWM Mode” on page 156 for more details. Table 15-6 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to phase cor- rect PWM mode. Note: 1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com- pare Match is ignored, but the set or clear is done at TOP. See “Phase Correct PWM Mode” on page 158 for more details. • Bits 3, 2 – Res: Reserved Bits These bits are reserved bits in the AT90USB64/128 and will always read as zero. • Bits 1:0 – WGM21:0: Waveform Generation Mode Combined with the WGM22 bit found in the TCCR2B Register, these bits control the counting sequence of the counter, the source for maximum (TOP) counter value, and what type of wave- form generation to be used, see Table 15-7. Modes of operation supported by the Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of Pulse Width Modulation (PWM) modes (see “Modes of Operation” on page 155). Table 15-5. Compare Output Mode, Fast PWM Mode (1) COM2B1 COM2B0 Description 0 0 Normal port operation, OC2B disconnected. 01 Reserved 1 0 Clear OC2B on Compare Match, set OC2B at TOP 1 1 Set OC2B on Compare Match, clear OC2B at TOP Table 15-6. Compare Output Mode, Phase Correct PWM Mode (1) COM2B1 COM2B0 Description 0 0 Normal port operation, OC2B disconnected. 01 Reserved 10 Clear OC2B on Compare Match when up-counting. Set OC2B on Compare Match when down-counting. 11 Set OC2B on Compare Match when up-counting. Clear OC2B on Compare Match when down-counting. Table 15-7. Waveform Generation Mode Bit Description Mode WGM2 WGM1 WGM0 Timer/Counter Mode of Operation TOP Update of OCRx at TOV Flag Set on(1)(2) 0 0 0 0 Normal 0xFF Immediate MAX 10 0 1 PWM, Phase Correct 0xFF TOP BOTTOM 2 0 1 0 CTC OCRA Immediate MAX |
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