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AT90USB646 Datasheet(PDF) 164 Page - ATMEL Corporation

Part # AT90USB646
Description  Microcontroller with 64/128K Bytes of ISP Flash and USB Controller
PDF  434 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT90USB646 Datasheet(HTML) 164 Page - ATMEL Corporation

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164
7593A–AVR–02/06
AT90USB64/128
Notes:
1. MAX= 0xFF
2. BOTTOM= 0x00
15.8.2
Timer/Counter Control Register B – TCCR2B
• Bit 7 – FOC2A: Force Output Compare A
The FOC2A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR2B is written when operating in PWM mode. When writing a logical one to the FOC2A bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC2A output is
changed according to its COM2A1:0 bits setting. Note that the FOC2A bit is implemented as a
strobe. Therefore it is the value present in the COM2A1:0 bits that determines the effect of the
forced compare.
A FOC2A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR2A as TOP.
The FOC2A bit is always read as zero.
• Bit 6 – FOC2B: Force Output Compare B
The FOC2B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR2B is written when operating in PWM mode. When writing a logical one to the FOC2B bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC2B output is
changed according to its COM2B1:0 bits setting. Note that the FOC2B bit is implemented as a
strobe. Therefore it is the value present in the COM2B1:0 bits that determines the effect of the
forced compare.
A FOC2B strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR2B as TOP.
The FOC2B bit is always read as zero.
• Bits 5:4 – Res: Reserved Bits
These bits are reserved bits in the AT90USB64/128 and will always read as zero.
3
0
1
1
Fast PWM
0xFF
TOP
MAX
41
0
0
Reserved
–
–
–
51
0
1
PWM, Phase
Correct
OCRA
TOP
BOTTOM
61
1
0
Reserved
–
–
–
7
1
1
1
Fast PWM
OCRA
TOP
TOP
Table 15-7.
Waveform Generation Mode Bit Description
Mode
WGM2
WGM1
WGM0
Timer/Counter
Mode of
Operation
TOP
Update of
OCRx at
TOV Flag
Set on(1)(2)
Bit
7
6
543
2
1
0
FOC2A
FOC2B
–
–
WGM22
CS22
CS21
CS20
TCCR2B
Read/Write
W
W
R
R
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0



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