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AT90USB646 Datasheet(PDF) 331 Page - ATMEL Corporation |
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AT90USB646 Datasheet(HTML) 331 Page - ATMEL Corporation |
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331 / 434 page ![]() 331 7593A–AVR–02/06 AT90USB64/128 25.8.2 ADC Control and Status Register A – ADCSRA • Bit 7 – ADEN: ADC Enable Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning the ADC off while a conversion is in progress, will terminate this conversion. • Bit 6 – ADSC: ADC Start Conversion In Single Conversion mode, write this bit to one to start each conversion. In Free Running mode, write this bit to one to start the first conversion. The first conversion after ADSC has been written after the ADC has been enabled, or if ADSC is written at the same time as the ADC is enabled, 01000 N/A (ADC0 / ADC0 / 10x) 01001 ADC1 ADC0 10x 01010 (ADC0 / ADC0 / 200x) 01011 ADC1 ADC0 200x 01100 (Reserved - ADC2 / ADC2 / 10x) 01101 ADC3 ADC2 10x 01110 (ADC2 / ADC2 / 200x) 01111 ADC3 ADC2 200x 10000 ADC0 ADC1 1x 10001 (ADC1 / ADC1 / 1x) 10010 ADC2 ADC1 1x 10011 ADC3 ADC1 1x 10100 ADC4 ADC1 1x 10101 ADC5 ADC1 1x 10110 ADC6 ADC1 1x 10111 ADC7 ADC1 1x 11000 ADC0 ADC2 1x 11001 ADC1 ADC2 1x 11010 (ADC2 / ADC2 / 1x) 11011 ADC3 ADC2 1x 11100 ADC4 ADC2 1x 11101 ADC5 ADC2 1x 11110 1.1V (VBand Gap) N/A 11111 0V (GND) Table 25-4. Input Channel and Gain Selections (Continued) MUX4..0 Single Ended Input Positive Differential Input Negative Differential Input Gain Bit 765 43 210 ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0 ADCSRA Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 |
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