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MSM7660 Datasheet(PDF) 13 Page - OKI electronic componets |
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MSM7660 Datasheet(HTML) 13 Page - OKI electronic componets |
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13 / 35 page ![]() ¡ Semiconductor MSM7660 13/35 of whether a jitter exists or not. Some VTR may disturb synchronization. 5. Epilogue Block The Epilogue Block outputs UV signals from the chrominance block and Y signals from the luminance block in the format based on the signal obtained by setting of the control register. In this block, the following modes can be selected. 1) Display of blue back when synchronization fails. OFF ON* 2) Output signal Y/CbCr format select YCbCr 4 : 1 : 1 YCbCr 4 : 2 : 2* The chrominance signal (U, V component) outputs Cb and Cr data to the C pin in an output format described later. 3) Selection of 8-bit chroma signal output format Offset binary* 2's Complement 4) Output pin enable select High impedance Output enable* The Epilogue Block has a high impedance priority cascade control function to enable the bus connection of output signals. The target tristate buses are Y, C, HSYNC_L and VSYNC_L, and this block makes an output enable instruction for these signals 5) Luminance signal phase adjustment normal* forward 1 clock backward 1 clock 6) Chrominance signal phase adjustment normal* forward 1 clock backward 1 clock 6. I2C Control Block This is the serial interface block based on the I2C standard of Phillips Corporation. This block functions only as a Slave-Receiver. The external control can set the internal registers (MRA, MRB, HSYT, etc.). 7. Test Control Block This block is used to test this LSI. Normally it is not used. |
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