MSM60804 datasheet(39/53 Pages) OKI

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MSM60804

¡ Semiconductor

I/O Control Register

The I/O Control Register is shown below. The bits are defined below.

D7 D6 D5 D4 D3 D2 D1 D0

Slot A : Index value (base+07h)

Slot B : Index value (base+47h)

I/O Window 0 Data Size

I/O Window 0

IC16 source

I/O Window 0 Zero_ws

I/O Window 0 WAIT State

I/O Window 1 Data Size

I/O Window 1

IC16 source

I/O Window 1 Zero_ws

I/O Window 1 WAIT State

I/O Control Register (Read/Write)

I/O Control Register Description

Bits

Description

Bit 7/Bit 3

Bit 6/Bit 2

Bit 5/Bit 1

Bit 4/Bit 0

I/O Window 1 WAIT State/ I/O Window 0 WAIT State. When these bits are set to "1" and a 16-bit I/O

access is carried out, an IRDY signal is made low for 1 SCLK cycle as a 1 wait request. It is invalid in

8-bit I/O access.

I/O Window 1 Zero wait state I/O Window 0 Zero wait state. When these bits are set to "1" and an

8-bit I/O access is carried out, NWS signal is effective.

I/O Window

IC16 Source I/O Window 0 IC16 Source. When these bits are set to "1", an IC16 signal is

generated from an

IOIS16 signal:when these bits are set to "0", an IC16 signal is generated from bit 4/bit 0.

I/O Window 1 Data Size I/O Window 0 Data Size. When these bits are set to "1", a 16-bit access is

enabled: when these bits are set to "0", an 8-bit access is enabled.

CE1, CE2 and Output Control

bit 1, 5

bit 0, 4

IOIS16

SBHE

IS16

CE2

CE1

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000

001

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