MWPR1024IZVHT datasheet(49/86 Pages) NXP

49 / 86 page

1. This parameter is measured with the internal reference (slow clock) being used as a reference to the FLL (FEI clock

mode).

2. The deviation is relative to the factory trimmed frequency at nominal VDD and 25 °C, fints_ft.

3. These typical values listed are with the slow internal reference clock (FEI) using factory trim and DMX32 = 0.

4. The resulting system clock frequencies must not exceed their maximum specified values. The DCO frequency

deviation (

Δfdco_t) over voltage and temperature must be considered.

5. These typical values listed are with the slow internal reference clock (FEI) using factory trim and DMX32 = 1.

6. The resulting clock frequency must not exceed the maximum specified clock frequency of the device.

7. This specification is based on standard deviation (RMS) of period or frequency.

8. This specification applies to any time the FLL reference source or reference divider is changed, trim value is changed,

DMX32 bit is changed, DRS bits are changed, or changing from FLL disabled (BLPE, BLPI) to FLL enabled (FEI, FEE,

FBE, FBI). If a crystal/resonator is being used as the reference, this specification assumes it is already running.

7.5.3.2 Reference Oscillator Specification

The MWPR1x24 has been designed to meet targeted specifications with a +/-20 ppm

frequency error over the life of the part, which includes the temperature, mechanical

and aging effects.

The table below lists the recommended crystal specifications. Note that these are

recommendations only and deviation may be allowed. However, deviations may result

in degraded RF performance or possibly a failure to meet RF protocol certification

standards. Designers must ensure that the crystal(s) they use will meet the

requirements of their application.

Table 25. Recommended Crystal Specification

Symbol

Description

Comment

32M

26M

Unit

Min

Typ

Max

Min

Typ

Max

Operating

Temperature

-40

105

-40

105

℃

Faging

Frequency

accuracy over

aging

1st year

-5

ppm -

1st yr

iFacc

Initial Frequency

accuracy

with respect

to XO

-10

ppm

Fstab

Frequency

stability

across

temperature,

mechanical ,

load and

voltage

changes

-10

ppm

Values of CL

supported(Integr

ated on die and

programmable)

Shunt parasitic

capacitance

0.469

0.67

0.871

0.42

0.6

0.78

Table continues on the next page...

MCU Electrical Characteristics

MWPR1124ZVHT/MWPR1024IZVHT Data Sheet, Rev. 0, 04/2018

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