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ES9219 Datasheet(PDF) 57 Page - ESS Technology,Inc

Part # ES9219
Description  32-bit Stereo Low Power DAC with Headphone Amplifier, Analog Volume Control, and Output Switch
PDF  67 Pages
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Manufacturer  ESS [ESS Technology,Inc]
Direct Link  http://www.esstech.com
Logo ESS - ESS Technology,Inc

ES9219 Datasheet(HTML) 57 Page - ESS Technology,Inc

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ES9219 Datasheet
CONFIDENTIAL ADVANCE INFORMATION 1.0.4
February 27, 2020
57
ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-8800 • Fax (408) 643-8801
Register 139-140: DRE GAIN CH2
I2C Slave Access:
I2S Sync Slave Access:
Clock Domain:
Bits
[15:0]
Mnemonic
DRE_GAIN2
Bits
Mnemonic
Description
[15:0]
DRE_GAIN2
Sets the DRE gain for channel 2.
Shift right 1 bit corresponds to -6dB
Valid from 16’h7FFF (30dB) to 16’h03FF (0dB)
Register 141-142: DRE ON THRESHOLD
I2C Slave Access:
I2S Sync Slave Access:
Clock Domain:
Bits
[15:0]
Mnemonic
DRE_ON_THRESH
Bits
Mnemonic
Description
[15:0]
DRE_ON_THRESH
DRE on threshold.
Shift right 1 bit corresponds to -6dB
16’hFFFF corresponds to -24dB
Register 143-144: DRE OFF THRESHOLD
I2C Slave Access:
I2S Sync Slave Access:
Clock Domain:
Bits
[15:0]
Mnemonic
DRE_OFF_THRESH
Bits
Mnemonic
Description
[15:0]
DRE_OFF_THRESH
DRE off threshold.
Shifting right 1 bit corresponds to -6dB
16’hFFFF corresponds to -24dB
Register 145: DRE DECAY RATE
I2C Slave Access:
I2S Sync Slave Access:
Clock Domain:
Bits
[7:5]
[4:0]
Mnemonic
RESERVED
DRE_DECAY_RATE
Bits
Mnemonic
Description
[7:5]
RESERVED
NA
[4:0]
DRE_DECAY_RATE
Sets the speed at which the stored value of the DRE peak detector will
decay when the input signal is below the stored value.
4’d31: slowest decay
4’d0: instant decay



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