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ISO6763FDWR Datasheet(PDF) 3 Page - Texas Instruments |
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ISO6763FDWR Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 44 page ![]() 5 Pin Configuration and Functions 1 VCC1 16 VCC2 2 15 3 INA_H 14 OUTA_H 4 INA_L 13 OUTA_L 5 INB_H 12 OUTB_H 6 INB_L 11 OUTB_L 10 8 GND1 9 GND2 Not to scale 7 INC_H INC_L OUTC_H OUTC_L Figure 5-1. ISO6760L DW Package 16-Pin SOIC-WB Top View Table 5-1. Pin Functions PIN I/O DESCRIPTION NAME ISO6760L GND1 8 — Ground connection for VCC1 GND2 9 — Ground connection for VCC2 INA_H 2 I Input, channel A_H (Interlock paired with channel A_L) INA_L 3 I Input, channel A_L (Interlock paired with channel A_H) INB_H 4 I Input, channel B_H (Interlock paired with channel B_L) INB_L 5 I Input, channel B_L (Interlock paired with channel B_H) INC_H 6 I Input, channel C_H (Interlock paired with channel C_L) INC_L 7 I Input, channel C_L (Interlock paired with channel C_H) OUTA_H 15 O Output, channel A_H (Interlock paired with channel A_L) OUTA_L 14 O Output, channel A_L (Interlock paired with channel A_H) OUTB_H 13 O Output, channel B_H (Interlock paired with channel B_L) OUTB_L 12 O Output, channel B_L (Interlock paired with channel B_H) OUTC_H 11 O Output, channel C_H (Interlock paired with channel C_L) OUTC_L 10 O Output, channel C_L (Interlock paired with channel C_H) VCC1 1 — Power supply, side 1 VCC2 16 — Power supply, side 2 www.ti.com ISO6760L SLLSFO3 – DECEMBER 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: ISO6760L |
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