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INA230 Datasheet(PDF) 20 Page - Texas Instruments

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Part # INA230
Description  INA230 36-V, 16-Bit, I2C Output Current, Voltage and Power Monitor With Alert
PDF  44 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

INA230 Datasheet(HTML) 20 Page - Texas Instruments

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Register bytes are sent most-significant byte first, followed by the least significant byte.
Frame 1 Two-Wire Target Address Byte
(1)
Frame 2 Register Pointer Byte
Start By
Controller
ACK By
Target
ACK By
Target
1
9
1
ACK By
Target
1
D15 D14
D13
D12 D11 D10
D9
D8
9
9
SDA
SCL
1
0
0
A3
A2
A1
A0
R/W
P7
P6
P5
P4
P3
P2
P1
P0
Frame 4 Data LSByte
Frame 3 Data MSByte
ACK By
Target
Stop By
Controller
1
D7
D6
D5
D4
D3
D2
D1
D0
9
(1) The value of the Target Address byte is determined by the setting of the address pins. Refer to Table 8-2.
(2) The device does not support packet error checking (PEC) or perform clock stretching.
Figure 8-4. Timing Diagram for Write Word Format
Frame 1 Two-Wire Target Address Byte
(1)
Frame 2 Data MSByte
(2)
1
Start By
Controller
ACK By
Target
ACK By
Controller
From
Target
1
9
1
9
SDA
SCL
0
0
A3
R/W
D15 D14 D13
D12
D11 D10
D9
D8
A2
A1
A0
Frame 3 Data LSByte
(2)
Stop
No ACK By
(3)
Controller
From
Target
1
9
D7
D6
D5
D4
D3
D2
D1
D0
(1) The value of the Target Address byte is determined by the setting of the address pins. Refer to Table 8-2.
(2) Read data is from the last register pointer location. If a new register is desired, the register pointer must be
updated. See Figure 8-7.
(3) ACK by the controller can also be sent.
(4) The device does not support packet error checking (PEC) or perform clock stretching.
Figure 8-5. Timing Diagram for Read Word Format
Figure 8-6 shows the timing diagram for the SMBus Alert response operation. Figure 8-7 shows a typical register
pointer configuration.
Frame 1 SMBus ALERT Response Address Byte
Frame 2 Target Address Byte
(1)
Start By
Controller
ACK By
Target
From
Target
NACK By
Controller
Stop By
Controller
1
9
1
9
SDA
SCL
ALERT
0
0
0
1
1
0
0
R/W
1
0
0
A3
A2
A1
A0
0
(1) The value of the Target Address byte is determined by the setting of the address pins. Refer to Table 8-2.
Figure 8-6. Timing Diagram for SMBus ALERT
INA230
SBOS601A – FEBRUARY 2012 – REVISED DECEMBER 2021
www.ti.com
20
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Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: INA230



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