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MXR7900DF Datasheet(PDF) 5 Page - MEMSIC Semiconductor (Tianjin) Co., Ltd. |
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MXR7900DF Datasheet(HTML) 5 Page - MEMSIC Semiconductor (Tianjin) Co., Ltd. |
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5 / 6 page ![]() MEMSIC MXR7900A/C/D Rev.A Page 5 of 6 4/09/2009 Resolution: The accelerometer resolution is limited by noise. The output noise will vary with the measurement bandwidth. With the reduction of the bandwidth, by applying an external low pass filter, the output noise drops. Reduction of bandwidth will improve the signal to noise ratio and the resolution. The output noise scales directly with the square root of the measurement bandwidth. The maximum amplitude of the noise, its peak- to- peak value, approximately defines the worst case resolution of the measurement. With a simple RC low pass filter, the rms noise is calculated as follows: Noise (mg rms) = Noise(mg/ Hz ) * ) 6 . 1 * ) ( ( Hz Bandwidth The peak-to-peak noise is approximately equal to 6.6 times the rms value (for an average uncertainty of 0.1%). 2 nd SOFTWARE COMPENSATAION 1.Block Diagram 2.Components: 2.1 Temperature Sensor Any type of sensor which can have at least +/-3 °C accuracy over -40~125 °C temperature range, one possible choice is TMP141 from Texas Instruments. Also, the temperature sensor need to be mounted as close as to MXR7900xF part as possible to sense the temperature correctly. 2.2 Capacitor C1: Grade higher than X7R, at least 0.22uF capacitor C2: 10uF electrolytic, Low-ESR capacitor Both the two capacitors need to be soldered as close as to the VDD pin, since the internal heater is in PWM (1MHz) control mode, with all VDD on the heater at some portion of the time, by using larger value capacitor can minimize the induced noise on the outputs. 2.3 MCU Anyway type of MCU with 2 of 12bits A/D port is OK. 3. Part Identity Reading 3.1 Digital Switching Characteristics SYMBOL PARAMETER MIN TYP MAX UNITS td7 Rising edge of CLK to rising edge of TP 2.0 ns td8 Rising edge of TP to valid data out 10.0 ns STin Frequency 1 800 KHz Note: Total delay time of td7+td8 should be less than half of cycling time of STin signal to make sure the data can be read out correctly at the falling edge of the STin signal. 3.2 Digital Parameters SYM BOL PARAMETER MIN TYP MAX UNITS VIH High Level Input Voltage VDD -.5 Volts VIL Low Level Input Voltage 0.5 Volts IIL Input Leakage, All Inputs 1.0 uA VOH High Level Output Voltage VDD -.5 Volts VOL Low Level Output Voltage 0.5 Volts 3.3 Waveform 3.4 Identity code number After the first rising edge of the STin, the first bit of the identity code will be appeared at pin Yout with a time td8 delay and exists for the whole STin cycle, the second bit of the identity code will be appeared at pin Yout after the second rising edge of STin, etc. There are totally 72bits, MEMSIC will use the 72bits data to identify each device, and provide its offset, sensitivity and selftest at 25 °C with the identity code. MXR7900A CLK STin Yout Xout VDD GND MCU A/D A/D I/O I/O I/O TEMP I/O C1 C2 CLK STin Yout Timing for Identity Code |
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