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TMUX8212 Datasheet(PDF) 23 Page - Texas Instruments |
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TMUX8212 Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 32 page ![]() 9.3.3.2 ESD Protection All pins support HBM ESD protection level up to ±2 kV, which helps protect the devices from ESD events during the manufacturing process. 9.3.3.3 Latch-Up Immunity Latch-up is a condition where a low impedance path is created between a supply pin and ground. This condition is caused by a trigger (current injection or overvoltage), but once activated the low impedance path remains even after the trigger is no longer present. This low impedance path may cause system upset or catastrophic damage due to excessive current levels. The latch-up condition typically requires a power cycle to eliminate the low impedance path. In the TMUX821x devices, an insulating oxide layer is placed on top of the silicon substrate to prevent any parasitic junctions from forming. As a result, the devices are latch-up immune under all circumstances by device construction. The TMUX821x devices are constructed on silicon on insulator (SOI) based process where an oxide layer is added between the PMOS and NMOS transistor of each CMOS switch to prevent parasitic structures from forming. The oxide layer is also known as an insulating trench and prevents triggering of latch up events due to overvoltage or current injections. The latch-up immunity feature allows the TMUX821x to be used in harsh environments. For more information on latch-up immunity refer to Using Latch Up Immune Multiplexers to Help Improve System Reliability. 9.3.4 1.8 V Logic Compatible Inputs The TMUX821x devices have 1.8 V logic compatible control for all logic control inputs. 1.8 V logic level inputs allows the TMUX821x to interface with processors that have lower logic I/O rails and eliminates the need for an external translator, which saves both space and BOM cost. For more information on 1.8 V logic implementations refer to Simplifying Design with 1.8 V logic Muxes and Switches. 9.3.5 Integrated Pull-Down Resistor on Logic Pins The TMUX821x have internal weak pull-down resistors to GND to ensure the logic pins are not left floating. The value of this pull-down resistor is approximately 4 MΩ, but is clamped to 1 µA at higher voltages. This feature integrates up to four external components and reduces system size and cost. www.ti.com TMUX8212 SCDS434A – OCTOBER 2021 – REVISED DECEMBER 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: TMUX8212 |
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