12 Layout

12.1 Layout Guidelines

The image below illustrates an example of a PCB layout with the TMUX821x device. Some key considerations

are:

the pin as possible. Make sure that the capacitor voltage rating is sufficient for the supply voltage.

• Keep the input lines as short as possible.

• Use a solid ground plane to help distribute heat and reduce electromagnetic interference (EMI) noise pickup.

• Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if

possible, and only make perpendicular crossings when necessary.

12.2 Layout Example

S1

D1

SEL1

VSS

D2

SEL2

TMUX821x

VDD

S2

N.C.

SEL3

D3

S3

GND

SEL4

D4

S4

Wide (low inductance)

trace for power

Wide (low inductance)

trace for power

Via to ground plane

Figure 12-1. TMUX821x TSSOP Layout Example

VSS

SEL2

SEL1

SEL3

GND

N.C.

SEL4

VDD

Wide (low inductance)

trace for power

Wide (low inductance)

trace for power

Via to ground plane

Figure 12-2. TMUX821x QFN Layout Example

TMUX8212

SCDS434A – OCTOBER 2021 – REVISED DECEMBER 2021

www.ti.com

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