LT3758 datasheet(9/28 Pages) AD

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LT8392

Rev. 0

For more information www.analog.com

CTRL: Control Input for ISP/ISN Current Sense Threshold.

The CTRL pin is used to program the ISP/ISN current limit:

IIS(MAX) =

Min VCTRL −0.25V,1V

(

)

20 •RIS

The VCTRL can be set by an external voltage reference or

a resistor divider from VREF to ground. For 0.25V ≤ VCTRL

≤ 1.15V, the current sense threshold linearly goes up

from 0mV to 45mV. For VCTRL ≥ 1.35V, the current sense

threshold is constant at 50mV full-scale value. For 1.15V

≤ VCTRL ≤ 1.35V, the current sense threshold smoothly

transitions from the linear function of VCTRL to the 50mV

constant value. Tie CTRL to VREF for the 50mV full-scale

threshold.

ISP: Positive Terminal of the ISP/ISN Current Sense

Resistor (RIS). Ensure accurate current sense with

Kelvin connection.

ISN: Negative Terminal of the ISP/ISN Current Sense

Resistor (RIS). Ensure accurate current sense with

Kelvin connection.

ISMON: ISP/ISN Current Sense Monitor Output. The

ISMON pin generates a voltage that is equal to twenty

times V(ISP-ISN) plus 0.25V offset voltage. For parallel

applications, tie the master LT8392 ISMON pin to the

slave LT8392 CTRL pin.

PGOOD: Power Good Open Drain Output. The PGOOD

pin is pulled low when the FB pin is within ±8% of the

final regulation voltage. To function, the pin requires an

external pull-up resistor.

SS: Soft-Start Timer Setting. The SS pin is used to set

soft-start timer by connecting a capacitor to ground. An

internal 12.5µA pull-up current charging the external SS

capacitor gradually ramps up FB regulation voltage. A

0.1µF capacitor is recommended on this pin. Any UVLO or

thermal shutdown immediately pulls SS pin to ground and

stops switching. Using a single resistor from SS to VREF,

the LT8392 can be set in three different fault protection

modes during output short-circuit condition: hiccup (no

resistor), latch-off (499kΩ), and keep-running (100kΩ).

See more details in the Application Information section.

PIN FUNCTIONS

FB: Voltage Loop Feedback Input. The FB pin is used for

constant-voltage regulation and output fault protection. The

internal error amplifier with its output VC regulates VFB to

1.00V through the DC/DC converter. During output short-cir-

cuit (VFB < 0.25V) condition, the part gets into one fault mode

per customer setting. During an overvoltage (VFB > 1.08V)

condition, the part turns off all TG1, BG1, TG2, and BG2.

VC: Error Amplifier Output to Set Inductor Current

Comparator Threshold. The VC pin is used to compensate

the control loop with an external RC network.

RT: Switching Frequency Setting. Connect a resistor from

this pin to ground to set the internal oscillator frequency

from 150kHz to 650kHz.

SYNC/SPRD: Switching Frequency Synchronization or

Spread Spectrum. Ground this pin for switching at inter-

nal oscillator frequency. Apply a clock signal for external

frequency synchronization. Tie to INTVCC for ±15% trian-

gle spread spectrum around internal oscillator frequency.

EXTVCC: Second Input Supply for Powering INTVCC. The part

intelligently chooses either VIN or EXTVCC for INTVCCLDO to

improve efficiency. See EXTVCCConnectionintheApplications

Information Section. Tie this pin ground if not used.

VOUT: Output Supply. The VOUT pin must be tied to the

power output to determine the buck, buck-boost, or boost

operation regions. Locally bypass this pin to ground with

a minimum 1µF ceramic capacitor.

TG2: Boost Side Top Gate Drive. Drives the gate of boost

side top N-Channel MOSFET with a voltage swing from

SW2 to BST2.

SW2: Boost Side Switch Node.

BST2: Boost Side Bootstrap Floating Driver Supply. The

BST2 pin has an integrated bootstrap Schottky diode from

the INTVCC pin and requires an external bootstrap capac-

itor to the SW2 pin.

BG2: Boost Side Bottom Gate Drive. Drives the gate of

boost side bottom N-Channel MOSFET with a voltage

swing from ground to INTVCC.

GND (Exposed Pad): Ground. Solder the exposed pad

directly to the ground plane.

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