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PCF8536AT Datasheet(PDF) 5 Page - NXP Semiconductors |
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PCF8536AT Datasheet(HTML) 5 Page - NXP Semiconductors |
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5 / 48 page ![]() PCE85176AUG All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 1 — 12 January 2015 5 of 48 NXP Semiconductors PCE85176AUG 4 × 40 LCD segment driver for Chip-On-Glass 7.1.1 Command: mode-set The mode-set command allows configuring the multiplex mode, the bias levels and enabling or disabling the display. [1] The possibility to disable the display allows implementation of blinking under external control. [2] The display is disabled by setting all backplane and segment outputs to VLCD. [3] Not applicable for static drive mode. 7.1.2 Command: load-data-pointer The load-data-pointer command defines the display RAM address where the following display data is sent to. Table 7. Mode-set command bit allocation Bit position labeled as - is not used. Bit 7 6 5 4 3 2 1 0 Symbol C 1 0 - E B M[1:0] Table 8. Mode-set command bit description Bit position labeled as - is not used. Bit Symbol Value Description 7C 0, 1 see Table 6 6, 5 - 10 fixed value 4 - - unused 3E display status[1] 0 disabled (blank)[2] 1 enabled 2B LCD bias configuration[3] 0 1⁄3 bias 1 1⁄2 bias 1 to 0 M[1:0] LCD drive mode selection 01 static; BP0 10 1:2 multiplex; BP0, BP1 11 1:3 multiplex; BP0, BP1, BP2 00 1:4 multiplex; BP0, BP1, BP2, BP3 Table 9. Load-data-pointer command bit allocation Bit 7 6 5 4 3 2 1 0 Symbol C0 P[5:0] Table 10. Load-data-pointer command bit description See Section 7.3.1. Bit Symbol Value Description 7C 0, 1 see Table 6 6 0 0 fixed value 5 to 0 P[5:0] 000000 to 100111 6-bit binary value, 0 to 39; transferred to the data pointer to define one of 40 display RAM addresses |
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